soc/fsl/dpaa2-io.h

0001 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
0002 /*
0003  * Copyright 2014-2016 Freescale Semiconductor Inc.
0004  * Copyright 2017-2019 NXP
0005  *
0006  */
0007 #ifndef __FSL_DPAA2_IO_H
0008 #define __FSL_DPAA2_IO_H
0009
0010 #include <linux/types.h>
0011 #include <linux/cpumask.h>
0012 #include <linux/irqreturn.h>
0013
0014 #include "dpaa2-fd.h"
0015 #include "dpaa2-global.h"
0016
0017 struct dpaa2_io;
0018 struct dpaa2_io_store;
0019 struct device;
0020
0021 /**
0022  * DOC: DPIO Service
0023  *
0024  * The DPIO service provides APIs for users to interact with the datapath
0025  * by enqueueing and dequeing frame descriptors.
0026  *
0027  * The following set of APIs can be used to enqueue and dequeue frames
0028  * as well as producing notification callbacks when data is available
0029  * for dequeue.
0030  */
0031
0032 #define DPAA2_IO_ANY_CPU    -1
0033
0034 /**
0035  * struct dpaa2_io_desc - The DPIO descriptor
0036  * @receives_notifications: Use notificaton mode. Non-zero if the DPIO
0037  *                  has a channel.
0038  * @has_8prio:      Set to non-zero for channel with 8 priority WQs.  Ignored
0039  *                  unless receives_notification is TRUE.
0040  * @cpu:            The cpu index that at least interrupt handlers will
0041  *                  execute on.
0042  * @stash_affinity: The stash affinity for this portal favour 'cpu'
0043  * @regs_cena:      The cache enabled regs.
0044  * @regs_cinh:      The cache inhibited regs
0045  * @dpio_id:        The dpio index
0046  * @qman_version:   The qman version
0047  * @qman_clk:       The qman clock frequency in Hz
0048  *
0049  * Describes the attributes and features of the DPIO object.
0050  */
0051 struct dpaa2_io_desc {
0052     int receives_notifications;
0053     int has_8prio;
0054     int cpu;
0055     void *regs_cena;
0056     void __iomem *regs_cinh;
0057     int dpio_id;
0058     u32 qman_version;
0059     u32 qman_clk;
0060 };
0061
0062 struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc,
0063                  struct device *dev);
0064
0065 void dpaa2_io_down(struct dpaa2_io *d);
0066
0067 irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj);
0068
0069 struct dpaa2_io *dpaa2_io_service_select(int cpu);
0070
0071 /**
0072  * struct dpaa2_io_notification_ctx - The DPIO notification context structure
0073  * @cb:           The callback to be invoked when the notification arrives
0074  * @is_cdan:      Zero for FQDAN, non-zero for CDAN
0075  * @id:           FQID or channel ID, needed for rearm
0076  * @desired_cpu:  The cpu on which the notifications will show up. Use
0077  *                DPAA2_IO_ANY_CPU if don't care
0078  * @dpio_id:      The dpio index
0079  * @qman64:       The 64-bit context value shows up in the FQDAN/CDAN.
0080  * @node:         The list node
0081  * @dpio_private: The dpio object internal to dpio_service
0082  *
0083  * Used when a FQDAN/CDAN registration is made by drivers.
0084  */
0085 struct dpaa2_io_notification_ctx {
0086     void (*cb)(struct dpaa2_io_notification_ctx *ctx);
0087     int is_cdan;
0088     u32 id;
0089     int desired_cpu;
0090     int dpio_id;
0091     u64 qman64;
0092     struct list_head node;
0093     void *dpio_private;
0094 };
0095
0096 int dpaa2_io_get_cpu(struct dpaa2_io *d);
0097
0098 int dpaa2_io_service_register(struct dpaa2_io *service,
0099                   struct dpaa2_io_notification_ctx *ctx,
0100                   struct device *dev);
0101 void dpaa2_io_service_deregister(struct dpaa2_io *service,
0102                  struct dpaa2_io_notification_ctx *ctx,
0103                  struct device *dev);
0104 int dpaa2_io_service_rearm(struct dpaa2_io *service,
0105                struct dpaa2_io_notification_ctx *ctx);
0106
0107 int dpaa2_io_service_pull_fq(struct dpaa2_io *d, u32 fqid,
0108                  struct dpaa2_io_store *s);
0109 int dpaa2_io_service_pull_channel(struct dpaa2_io *d, u32 channelid,
0110                   struct dpaa2_io_store *s);
0111
0112 int dpaa2_io_service_enqueue_fq(struct dpaa2_io *d, u32 fqid,
0113                 const struct dpaa2_fd *fd);
0114 int dpaa2_io_service_enqueue_multiple_fq(struct dpaa2_io *d, u32 fqid,
0115                 const struct dpaa2_fd *fd, int number_of_frame);
0116 int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d, u32 *fqid,
0117                 const struct dpaa2_fd *fd, int number_of_frame);
0118 int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
0119                 u16 qdbin, const struct dpaa2_fd *fd);
0120 int dpaa2_io_service_release(struct dpaa2_io *d, u16 bpid,
0121                  const u64 *buffers, unsigned int num_buffers);
0122 int dpaa2_io_service_acquire(struct dpaa2_io *d, u16 bpid,
0123                  u64 *buffers, unsigned int num_buffers);
0124
0125 struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames,
0126                          struct device *dev);
0127 void dpaa2_io_store_destroy(struct dpaa2_io_store *s);
0128 struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last);
0129
0130 int dpaa2_io_query_fq_count(struct dpaa2_io *d, u32 fqid,
0131                 u32 *fcnt, u32 *bcnt);
0132 int dpaa2_io_query_bp_count(struct dpaa2_io *d, u16 bpid,
0133                 u32 *num);
0134
0135 int dpaa2_io_set_irq_coalescing(struct dpaa2_io *d, u32 irq_holdoff);
0136 void dpaa2_io_get_irq_coalescing(struct dpaa2_io *d, u32 *irq_holdoff);
0137 void dpaa2_io_set_adaptive_coalescing(struct dpaa2_io *d,
0138                       int use_adaptive_rx_coalesce);
0139 int dpaa2_io_get_adaptive_coalescing(struct dpaa2_io *d);
0140 void dpaa2_io_update_net_dim(struct dpaa2_io *d, __u64 frames, __u64 bytes);
0141 #endif /* __FSL_DPAA2_IO_H */