0001
0002
0003
0004
0005
0006
0007 #ifndef TID_RDMA_DEFS_H
0008 #define TID_RDMA_DEFS_H
0009
0010 #include <rdma/ib_pack.h>
0011
0012 struct tid_rdma_read_req {
0013 __le32 kdeth0;
0014 __le32 kdeth1;
0015 struct ib_reth reth;
0016 __be32 tid_flow_psn;
0017 __be32 tid_flow_qp;
0018 __be32 verbs_qp;
0019 };
0020
0021 struct tid_rdma_read_resp {
0022 __le32 kdeth0;
0023 __le32 kdeth1;
0024 __be32 aeth;
0025 __be32 reserved[4];
0026 __be32 verbs_psn;
0027 __be32 verbs_qp;
0028 };
0029
0030 struct tid_rdma_write_req {
0031 __le32 kdeth0;
0032 __le32 kdeth1;
0033 struct ib_reth reth;
0034 __be32 reserved[2];
0035 __be32 verbs_qp;
0036 };
0037
0038 struct tid_rdma_write_resp {
0039 __le32 kdeth0;
0040 __le32 kdeth1;
0041 __be32 aeth;
0042 __be32 reserved[3];
0043 __be32 tid_flow_psn;
0044 __be32 tid_flow_qp;
0045 __be32 verbs_qp;
0046 };
0047
0048 struct tid_rdma_write_data {
0049 __le32 kdeth0;
0050 __le32 kdeth1;
0051 __be32 reserved[6];
0052 __be32 verbs_qp;
0053 };
0054
0055 struct tid_rdma_resync {
0056 __le32 kdeth0;
0057 __le32 kdeth1;
0058 __be32 reserved[6];
0059 __be32 verbs_qp;
0060 };
0061
0062 struct tid_rdma_ack {
0063 __le32 kdeth0;
0064 __le32 kdeth1;
0065 __be32 aeth;
0066 __be32 reserved[2];
0067 __be32 tid_flow_psn;
0068 __be32 verbs_psn;
0069 __be32 tid_flow_qp;
0070 __be32 verbs_qp;
0071 };
0072
0073
0074
0075
0076 #define IB_OPCODE_TID_RDMA 0xe0
0077 enum {
0078 IB_OPCODE_WRITE_REQ = 0x0,
0079 IB_OPCODE_WRITE_RESP = 0x1,
0080 IB_OPCODE_WRITE_DATA = 0x2,
0081 IB_OPCODE_WRITE_DATA_LAST = 0x3,
0082 IB_OPCODE_READ_REQ = 0x4,
0083 IB_OPCODE_READ_RESP = 0x5,
0084 IB_OPCODE_RESYNC = 0x6,
0085 IB_OPCODE_ACK = 0x7,
0086
0087 IB_OPCODE(TID_RDMA, WRITE_REQ),
0088 IB_OPCODE(TID_RDMA, WRITE_RESP),
0089 IB_OPCODE(TID_RDMA, WRITE_DATA),
0090 IB_OPCODE(TID_RDMA, WRITE_DATA_LAST),
0091 IB_OPCODE(TID_RDMA, READ_REQ),
0092 IB_OPCODE(TID_RDMA, READ_RESP),
0093 IB_OPCODE(TID_RDMA, RESYNC),
0094 IB_OPCODE(TID_RDMA, ACK),
0095 };
0096
0097 #define TID_OP(x) IB_OPCODE_TID_RDMA_##x
0098
0099
0100
0101
0102
0103
0104
0105 #define IB_WR_TID_RDMA_WRITE IB_WR_RESERVED1
0106 #define IB_WR_TID_RDMA_READ IB_WR_RESERVED2
0107
0108 #endif