include/pcmcia/cisreg.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * cisreg.h
0004  *
0005  * The initial developer of the original code is David A. Hinds
0006  * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
0007  * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
0008  *
0009  * (C) 1999             David A. Hinds
0010  */
0011
0012 #ifndef _LINUX_CISREG_H
0013 #define _LINUX_CISREG_H
0014
0015 /*
0016  * Offsets from ConfigBase for CIS registers
0017  */
0018 #define CISREG_COR      0x00
0019 #define CISREG_CCSR     0x02
0020 #define CISREG_PRR      0x04
0021 #define CISREG_SCR      0x06
0022 #define CISREG_ESR      0x08
0023 #define CISREG_IOBASE_0     0x0a
0024 #define CISREG_IOBASE_1     0x0c
0025 #define CISREG_IOBASE_2     0x0e
0026 #define CISREG_IOBASE_3     0x10
0027 #define CISREG_IOSIZE       0x12
0028
0029 /*
0030  * Configuration Option Register
0031  */
0032 #define COR_CONFIG_MASK     0x3f
0033 #define COR_MFC_CONFIG_MASK 0x38
0034 #define COR_FUNC_ENA        0x01
0035 #define COR_ADDR_DECODE     0x02
0036 #define COR_IREQ_ENA        0x04
0037 #define COR_LEVEL_REQ       0x40
0038 #define COR_SOFT_RESET      0x80
0039
0040 /*
0041  * Card Configuration and Status Register
0042  */
0043 #define CCSR_INTR_ACK       0x01
0044 #define CCSR_INTR_PENDING   0x02
0045 #define CCSR_POWER_DOWN     0x04
0046 #define CCSR_AUDIO_ENA      0x08
0047 #define CCSR_IOIS8      0x20
0048 #define CCSR_SIGCHG_ENA     0x40
0049 #define CCSR_CHANGED        0x80
0050
0051 /*
0052  * Pin Replacement Register
0053  */
0054 #define PRR_WP_STATUS       0x01
0055 #define PRR_READY_STATUS    0x02
0056 #define PRR_BVD2_STATUS     0x04
0057 #define PRR_BVD1_STATUS     0x08
0058 #define PRR_WP_EVENT        0x10
0059 #define PRR_READY_EVENT     0x20
0060 #define PRR_BVD2_EVENT      0x40
0061 #define PRR_BVD1_EVENT      0x80
0062
0063 /*
0064  * Socket and Copy Register
0065  */
0066 #define SCR_SOCKET_NUM      0x0f
0067 #define SCR_COPY_NUM        0x70
0068
0069 /*
0070  * Extended Status Register
0071  */
0072 #define ESR_REQ_ATTN_ENA    0x01
0073 #define ESR_REQ_ATTN        0x10
0074
0075 /*
0076  * CardBus Function Status Registers
0077  */
0078 #define CBFN_EVENT      0x00
0079 #define CBFN_MASK       0x04
0080 #define CBFN_STATE      0x08
0081 #define CBFN_FORCE      0x0c
0082
0083 /*
0084  * These apply to all the CardBus function registers
0085  */
0086 #define CBFN_WP         0x0001
0087 #define CBFN_READY      0x0002
0088 #define CBFN_BVD2       0x0004
0089 #define CBFN_BVD1       0x0008
0090 #define CBFN_GWAKE      0x0010
0091 #define CBFN_INTR       0x8000
0092
0093 /*
0094  * Extra bits in the Function Event Mask Register
0095  */
0096 #define FEMR_BAM_ENA        0x0020
0097 #define FEMR_PWM_ENA        0x0040
0098 #define FEMR_WKUP_MASK      0x4000
0099
0100 /*
0101  * Indirect Addressing Registers for Zoomed Video: these are addresses
0102  * in common memory space
0103  */
0104 #define CISREG_ICTRL0       0x02    /* control registers */
0105 #define CISREG_ICTRL1       0x03
0106 #define CISREG_IADDR0       0x04    /* address registers */
0107 #define CISREG_IADDR1       0x05
0108 #define CISREG_IADDR2       0x06
0109 #define CISREG_IADDR3       0x07
0110 #define CISREG_IDATA0       0x08    /* data registers */
0111 #define CISREG_IDATA1       0x09
0112
0113 #define ICTRL0_COMMON       0x01
0114 #define ICTRL0_AUTOINC      0x02
0115 #define ICTRL0_BYTEGRAN     0x04
0116
0117 #endif /* _LINUX_CISREG_H */