media/davinci/dm355_ccdc.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (C) 2005-2009 Texas Instruments Inc
0004  */
0005 #ifndef _DM355_CCDC_H
0006 #define _DM355_CCDC_H
0007 #include <media/davinci/ccdc_types.h>
0008 #include <media/davinci/vpfe_types.h>
0009
0010 /* enum for No of pixel per line to be avg. in Black Clamping */
0011 enum ccdc_sample_length {
0012     CCDC_SAMPLE_1PIXELS,
0013     CCDC_SAMPLE_2PIXELS,
0014     CCDC_SAMPLE_4PIXELS,
0015     CCDC_SAMPLE_8PIXELS,
0016     CCDC_SAMPLE_16PIXELS
0017 };
0018
0019 /* enum for No of lines in Black Clamping */
0020 enum ccdc_sample_line {
0021     CCDC_SAMPLE_1LINES,
0022     CCDC_SAMPLE_2LINES,
0023     CCDC_SAMPLE_4LINES,
0024     CCDC_SAMPLE_8LINES,
0025     CCDC_SAMPLE_16LINES
0026 };
0027
0028 /* enum for Alaw gamma width */
0029 enum ccdc_gamma_width {
0030     CCDC_GAMMA_BITS_13_4,
0031     CCDC_GAMMA_BITS_12_3,
0032     CCDC_GAMMA_BITS_11_2,
0033     CCDC_GAMMA_BITS_10_1,
0034     CCDC_GAMMA_BITS_09_0
0035 };
0036
0037 enum ccdc_colpats {
0038     CCDC_RED,
0039     CCDC_GREEN_RED,
0040     CCDC_GREEN_BLUE,
0041     CCDC_BLUE
0042 };
0043
0044 struct ccdc_col_pat {
0045     enum ccdc_colpats olop;
0046     enum ccdc_colpats olep;
0047     enum ccdc_colpats elop;
0048     enum ccdc_colpats elep;
0049 };
0050
0051 enum ccdc_datasft {
0052     CCDC_DATA_NO_SHIFT,
0053     CCDC_DATA_SHIFT_1BIT,
0054     CCDC_DATA_SHIFT_2BIT,
0055     CCDC_DATA_SHIFT_3BIT,
0056     CCDC_DATA_SHIFT_4BIT,
0057     CCDC_DATA_SHIFT_5BIT,
0058     CCDC_DATA_SHIFT_6BIT
0059 };
0060
0061 enum ccdc_data_size {
0062     CCDC_DATA_16BITS,
0063     CCDC_DATA_15BITS,
0064     CCDC_DATA_14BITS,
0065     CCDC_DATA_13BITS,
0066     CCDC_DATA_12BITS,
0067     CCDC_DATA_11BITS,
0068     CCDC_DATA_10BITS,
0069     CCDC_DATA_8BITS
0070 };
0071 enum ccdc_mfilt1 {
0072     CCDC_NO_MEDIAN_FILTER1,
0073     CCDC_AVERAGE_FILTER1,
0074     CCDC_MEDIAN_FILTER1
0075 };
0076
0077 enum ccdc_mfilt2 {
0078     CCDC_NO_MEDIAN_FILTER2,
0079     CCDC_AVERAGE_FILTER2,
0080     CCDC_MEDIAN_FILTER2
0081 };
0082
0083 /* structure for ALaw */
0084 struct ccdc_a_law {
0085     /* Enable/disable A-Law */
0086     unsigned char enable;
0087     /* Gamma Width Input */
0088     enum ccdc_gamma_width gamma_wd;
0089 };
0090
0091 /* structure for Black Clamping */
0092 struct ccdc_black_clamp {
0093     /* only if bClampEnable is TRUE */
0094     unsigned char b_clamp_enable;
0095     /* only if bClampEnable is TRUE */
0096     enum ccdc_sample_length sample_pixel;
0097     /* only if bClampEnable is TRUE */
0098     enum ccdc_sample_line sample_ln;
0099     /* only if bClampEnable is TRUE */
0100     unsigned short start_pixel;
0101     /* only if bClampEnable is FALSE */
0102     unsigned short sgain;
0103     unsigned short dc_sub;
0104 };
0105
0106 /* structure for Black Level Compensation */
0107 struct ccdc_black_compensation {
0108     /* Constant value to subtract from Red component */
0109     unsigned char r;
0110     /* Constant value to subtract from Gr component */
0111     unsigned char gr;
0112     /* Constant value to subtract from Blue component */
0113     unsigned char b;
0114     /* Constant value to subtract from Gb component */
0115     unsigned char gb;
0116 };
0117
0118 struct ccdc_float {
0119     int integer;
0120     unsigned int decimal;
0121 };
0122
0123 #define CCDC_CSC_COEFF_TABLE_SIZE   16
0124 /* structure for color space converter */
0125 struct ccdc_csc {
0126     unsigned char enable;
0127     /*
0128      * S8Q5. Use 2 decimal precision, user values range from -3.00 to 3.99.
0129      * example - to use 1.03, set integer part as 1, and decimal part as 3
0130      * to use -1.03, set integer part as -1 and decimal part as 3
0131      */
0132     struct ccdc_float coeff[CCDC_CSC_COEFF_TABLE_SIZE];
0133 };
0134
0135 /* Structures for Vertical Defect Correction*/
0136 enum ccdc_vdf_csl {
0137     CCDC_VDF_NORMAL,
0138     CCDC_VDF_HORZ_INTERPOL_SAT,
0139     CCDC_VDF_HORZ_INTERPOL
0140 };
0141
0142 enum ccdc_vdf_cuda {
0143     CCDC_VDF_WHOLE_LINE_CORRECT,
0144     CCDC_VDF_UPPER_DISABLE
0145 };
0146
0147 enum ccdc_dfc_mwr {
0148     CCDC_DFC_MWR_WRITE_COMPLETE,
0149     CCDC_DFC_WRITE_REG
0150 };
0151
0152 enum ccdc_dfc_mrd {
0153     CCDC_DFC_READ_COMPLETE,
0154     CCDC_DFC_READ_REG
0155 };
0156
0157 enum ccdc_dfc_ma_rst {
0158     CCDC_DFC_INCR_ADDR,
0159     CCDC_DFC_CLR_ADDR
0160 };
0161
0162 enum ccdc_dfc_mclr {
0163     CCDC_DFC_CLEAR_COMPLETE,
0164     CCDC_DFC_CLEAR
0165 };
0166
0167 struct ccdc_dft_corr_ctl {
0168     enum ccdc_vdf_csl vdfcsl;
0169     enum ccdc_vdf_cuda vdfcuda;
0170     unsigned int vdflsft;
0171 };
0172
0173 struct ccdc_dft_corr_mem_ctl {
0174     enum ccdc_dfc_mwr dfcmwr;
0175     enum ccdc_dfc_mrd dfcmrd;
0176     enum ccdc_dfc_ma_rst dfcmarst;
0177     enum ccdc_dfc_mclr dfcmclr;
0178 };
0179
0180 #define CCDC_DFT_TABLE_SIZE 16
0181 /*
0182  * Main Structure for vertical defect correction. Vertical defect
0183  * correction can correct up to 16 defects if defects less than 16
0184  * then pad the rest with 0
0185  */
0186 struct ccdc_vertical_dft {
0187     unsigned char ver_dft_en;
0188     unsigned char gen_dft_en;
0189     unsigned int saturation_ctl;
0190     struct ccdc_dft_corr_ctl dft_corr_ctl;
0191     struct ccdc_dft_corr_mem_ctl dft_corr_mem_ctl;
0192     int table_size;
0193     unsigned int dft_corr_horz[CCDC_DFT_TABLE_SIZE];
0194     unsigned int dft_corr_vert[CCDC_DFT_TABLE_SIZE];
0195     unsigned int dft_corr_sub1[CCDC_DFT_TABLE_SIZE];
0196     unsigned int dft_corr_sub2[CCDC_DFT_TABLE_SIZE];
0197     unsigned int dft_corr_sub3[CCDC_DFT_TABLE_SIZE];
0198 };
0199
0200 struct ccdc_data_offset {
0201     unsigned char horz_offset;
0202     unsigned char vert_offset;
0203 };
0204
0205 /*
0206  * Structure for CCDC configuration parameters for raw capture mode passed
0207  * by application
0208  */
0209 struct ccdc_config_params_raw {
0210     /* data shift to be applied before storing */
0211     enum ccdc_datasft datasft;
0212     /* data size value from 8 to 16 bits */
0213     enum ccdc_data_size data_sz;
0214     /* median filter for sdram */
0215     enum ccdc_mfilt1 mfilt1;
0216     enum ccdc_mfilt2 mfilt2;
0217     /* low pass filter enable/disable */
0218     unsigned char lpf_enable;
0219     /* Threshold of median filter */
0220     int med_filt_thres;
0221     /*
0222      * horz and vertical data offset. Applicable for defect correction
0223      * and lsc
0224      */
0225     struct ccdc_data_offset data_offset;
0226     /* Structure for Optional A-Law */
0227     struct ccdc_a_law alaw;
0228     /* Structure for Optical Black Clamp */
0229     struct ccdc_black_clamp blk_clamp;
0230     /* Structure for Black Compensation */
0231     struct ccdc_black_compensation blk_comp;
0232     /* structure for vertical Defect Correction Module Configuration */
0233     struct ccdc_vertical_dft vertical_dft;
0234     /* structure for color space converter Module Configuration */
0235     struct ccdc_csc csc;
0236     /* color patters for bayer capture */
0237     struct ccdc_col_pat col_pat_field0;
0238     struct ccdc_col_pat col_pat_field1;
0239 };
0240
0241 #ifdef __KERNEL__
0242 #include <linux/io.h>
0243
0244 #define CCDC_WIN_PAL    {0, 0, 720, 576}
0245 #define CCDC_WIN_VGA    {0, 0, 640, 480}
0246
0247 struct ccdc_params_ycbcr {
0248     /* pixel format */
0249     enum ccdc_pixfmt pix_fmt;
0250     /* progressive or interlaced frame */
0251     enum ccdc_frmfmt frm_fmt;
0252     /* video window */
0253     struct v4l2_rect win;
0254     /* field id polarity */
0255     enum vpfe_pin_pol fid_pol;
0256     /* vertical sync polarity */
0257     enum vpfe_pin_pol vd_pol;
0258     /* horizontal sync polarity */
0259     enum vpfe_pin_pol hd_pol;
0260     /* enable BT.656 embedded sync mode */
0261     int bt656_enable;
0262     /* cb:y:cr:y or y:cb:y:cr in memory */
0263     enum ccdc_pixorder pix_order;
0264     /* interleaved or separated fields  */
0265     enum ccdc_buftype buf_type;
0266 };
0267
0268 /* Gain applied to Raw Bayer data */
0269 struct ccdc_gain {
0270     unsigned short r_ye;
0271     unsigned short gr_cy;
0272     unsigned short gb_g;
0273     unsigned short b_mg;
0274 };
0275
0276 /* Structure for CCDC configuration parameters for raw capture mode */
0277 struct ccdc_params_raw {
0278     /* pixel format */
0279     enum ccdc_pixfmt pix_fmt;
0280     /* progressive or interlaced frame */
0281     enum ccdc_frmfmt frm_fmt;
0282     /* video window */
0283     struct v4l2_rect win;
0284     /* field id polarity */
0285     enum vpfe_pin_pol fid_pol;
0286     /* vertical sync polarity */
0287     enum vpfe_pin_pol vd_pol;
0288     /* horizontal sync polarity */
0289     enum vpfe_pin_pol hd_pol;
0290     /* interleaved or separated fields */
0291     enum ccdc_buftype buf_type;
0292     /* Gain values */
0293     struct ccdc_gain gain;
0294     /* offset */
0295     unsigned int ccdc_offset;
0296     /* horizontal flip enable */
0297     unsigned char horz_flip_enable;
0298     /*
0299      * enable to store the image in inverse order in memory
0300      * (bottom to top)
0301      */
0302     unsigned char image_invert_enable;
0303     /* Configurable part of raw data */
0304     struct ccdc_config_params_raw config_params;
0305 };
0306
0307 #endif
0308 #endif              /* DM355_CCDC_H */