linux/usb/isp1362.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * board initialization code should put one of these into dev->platform_data
0004  * and place the isp1362 onto platform_bus.
0005  */
0006
0007 #ifndef __LINUX_USB_ISP1362_H__
0008 #define __LINUX_USB_ISP1362_H__
0009
0010 struct isp1362_platform_data {
0011     /* Enable internal pulldown resistors on downstream ports */
0012     unsigned sel15Kres:1;
0013     /* Clock cannot be stopped */
0014     unsigned clknotstop:1;
0015     /* On-chip overcurrent protection */
0016     unsigned oc_enable:1;
0017     /* INT output polarity */
0018     unsigned int_act_high:1;
0019     /* INT edge or level triggered */
0020     unsigned int_edge_triggered:1;
0021     /* DREQ output polarity */
0022     unsigned dreq_act_high:1;
0023     /* DACK input polarity */
0024     unsigned dack_act_high:1;
0025     /* chip can be resumed via H_WAKEUP pin */
0026     unsigned remote_wakeup_connected:1;
0027     /* Switch or not to switch (keep always powered) */
0028     unsigned no_power_switching:1;
0029     /* Ganged port power switching (0) or individual port power switching (1) */
0030     unsigned power_switching_mode:1;
0031     /* Given port_power, msec/2 after power on till power good */
0032     u8 potpg;
0033     /* Hardware reset set/clear */
0034     void (*reset) (struct device *dev, int set);
0035     /* Clock start/stop */
0036     void (*clock) (struct device *dev, int start);
0037     /* Inter-io delay (ns). The chip is picky about access timings; it
0038      * expects at least:
0039      * 110ns delay between consecutive accesses to DATA_REG,
0040      * 300ns delay between access to ADDR_REG and DATA_REG (registers)
0041      * 462ns delay between access to ADDR_REG and DATA_REG (buffer memory)
0042      * WE MUST NOT be activated during these intervals (even without CS!)
0043      */
0044     void (*delay) (struct device *dev, unsigned int delay);
0045 };
0046
0047 #endif