include/linux/ucb1400.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Register definitions and functions for:
0004  *  Philips UCB1400 driver
0005  *
0006  * Based on ucb1400_ts:
0007  *  Author: Nicolas Pitre
0008  *  Created:    September 25, 2006
0009  *  Copyright:  MontaVista Software, Inc.
0010  *
0011  * Spliting done by: Marek Vasut <marek.vasut@gmail.com>
0012  * If something doesn't work and it worked before spliting, e-mail me,
0013  * dont bother Nicolas please ;-)
0014  *
0015  * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
0016  * covering the UCB1100, UCB1200 and UCB1300..  Support for the UCB1400 has
0017  * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
0018  */
0019
0020 #ifndef _LINUX__UCB1400_H
0021 #define _LINUX__UCB1400_H
0022
0023 #include <sound/ac97_codec.h>
0024 #include <linux/mutex.h>
0025 #include <linux/platform_device.h>
0026 #include <linux/gpio.h>
0027
0028 /*
0029  * UCB1400 AC-link registers
0030  */
0031
0032 #define UCB_IO_DATA     0x5a
0033 #define UCB_IO_DIR      0x5c
0034 #define UCB_IE_RIS      0x5e
0035 #define UCB_IE_FAL      0x60
0036 #define UCB_IE_STATUS       0x62
0037 #define UCB_IE_CLEAR        0x62
0038 #define UCB_IE_ADC      (1 << 11)
0039 #define UCB_IE_TSPX     (1 << 12)
0040
0041 #define UCB_TS_CR       0x64
0042 #define UCB_TS_CR_TSMX_POW  (1 << 0)
0043 #define UCB_TS_CR_TSPX_POW  (1 << 1)
0044 #define UCB_TS_CR_TSMY_POW  (1 << 2)
0045 #define UCB_TS_CR_TSPY_POW  (1 << 3)
0046 #define UCB_TS_CR_TSMX_GND  (1 << 4)
0047 #define UCB_TS_CR_TSPX_GND  (1 << 5)
0048 #define UCB_TS_CR_TSMY_GND  (1 << 6)
0049 #define UCB_TS_CR_TSPY_GND  (1 << 7)
0050 #define UCB_TS_CR_MODE_INT  (0 << 8)
0051 #define UCB_TS_CR_MODE_PRES (1 << 8)
0052 #define UCB_TS_CR_MODE_POS  (2 << 8)
0053 #define UCB_TS_CR_BIAS_ENA  (1 << 11)
0054 #define UCB_TS_CR_TSPX_LOW  (1 << 12)
0055 #define UCB_TS_CR_TSMX_LOW  (1 << 13)
0056
0057 #define UCB_ADC_CR      0x66
0058 #define UCB_ADC_SYNC_ENA    (1 << 0)
0059 #define UCB_ADC_VREFBYP_CON (1 << 1)
0060 #define UCB_ADC_INP_TSPX    (0 << 2)
0061 #define UCB_ADC_INP_TSMX    (1 << 2)
0062 #define UCB_ADC_INP_TSPY    (2 << 2)
0063 #define UCB_ADC_INP_TSMY    (3 << 2)
0064 #define UCB_ADC_INP_AD0     (4 << 2)
0065 #define UCB_ADC_INP_AD1     (5 << 2)
0066 #define UCB_ADC_INP_AD2     (6 << 2)
0067 #define UCB_ADC_INP_AD3     (7 << 2)
0068 #define UCB_ADC_EXT_REF     (1 << 5)
0069 #define UCB_ADC_START       (1 << 7)
0070 #define UCB_ADC_ENA     (1 << 15)
0071
0072 #define UCB_ADC_DATA        0x68
0073 #define UCB_ADC_DAT_VALID   (1 << 15)
0074
0075 #define UCB_FCSR        0x6c
0076 #define UCB_FCSR_AVE        (1 << 12)
0077
0078 #define UCB_ADC_DAT_MASK    0x3ff
0079
0080 #define UCB_ID          0x7e
0081 #define UCB_ID_1400             0x4304
0082
0083 struct ucb1400_gpio {
0084     struct gpio_chip    gc;
0085     struct snd_ac97     *ac97;
0086     int         gpio_offset;
0087 };
0088
0089 struct ucb1400_ts {
0090     struct input_dev    *ts_idev;
0091     int         id;
0092     int         irq;
0093     struct snd_ac97     *ac97;
0094     wait_queue_head_t   ts_wait;
0095     bool            stopped;
0096 };
0097
0098 struct ucb1400 {
0099     struct platform_device  *ucb1400_ts;
0100     struct platform_device  *ucb1400_gpio;
0101 };
0102
0103 struct ucb1400_pdata {
0104     int irq;
0105     int gpio_offset;
0106     int (*gpio_setup)(struct device *dev, int ngpio);
0107     int (*gpio_teardown)(struct device *dev, int ngpio);
0108 };
0109
0110 static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg)
0111 {
0112     return ac97->bus->ops->read(ac97, reg);
0113 }
0114
0115 static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val)
0116 {
0117     ac97->bus->ops->write(ac97, reg, val);
0118 }
0119
0120 static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio)
0121 {
0122     return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio);
0123 }
0124
0125 static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio,
0126                         u16 val)
0127 {
0128     ucb1400_reg_write(ac97, UCB_IO_DATA, val ?
0129             ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) :
0130             ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio));
0131 }
0132
0133 static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio)
0134 {
0135     return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio);
0136 }
0137
0138 static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio,
0139                         u16 dir)
0140 {
0141     ucb1400_reg_write(ac97, UCB_IO_DIR, dir ?
0142             ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) :
0143             ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio));
0144 }
0145
0146 static inline void ucb1400_adc_enable(struct snd_ac97 *ac97)
0147 {
0148     ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA);
0149 }
0150
0151 static inline void ucb1400_adc_disable(struct snd_ac97 *ac97)
0152 {
0153     ucb1400_reg_write(ac97, UCB_ADC_CR, 0);
0154 }
0155
0156
0157 unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel,
0158                   int adcsync);
0159
0160 #endif