include/linux/svga.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _LINUX_SVGA_H
0003 #define _LINUX_SVGA_H
0004
0005 #include <linux/pci.h>
0006 #include <video/vga.h>
0007
0008 /* Terminator for register set */
0009
0010 #define VGA_REGSET_END_VAL  0xFF
0011 #define VGA_REGSET_END      {VGA_REGSET_END_VAL, 0, 0}
0012
0013 struct vga_regset {
0014     u8 regnum;
0015     u8 lowbit;
0016     u8 highbit;
0017 };
0018
0019 /* ------------------------------------------------------------------------- */
0020
0021 #define SVGA_FORMAT_END_VAL 0xFFFF
0022 #define SVGA_FORMAT_END     {SVGA_FORMAT_END_VAL, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 0, 0, 0, 0, 0, 0}
0023
0024 struct svga_fb_format {
0025     /* var part */
0026     u32 bits_per_pixel;
0027     struct fb_bitfield red;
0028     struct fb_bitfield green;
0029     struct fb_bitfield blue;
0030     struct fb_bitfield transp;
0031     u32 nonstd;
0032     /* fix part */
0033     u32 type;
0034     u32 type_aux;
0035     u32 visual;
0036     u32 xpanstep;
0037     u32 xresstep;
0038 };
0039
0040 struct svga_timing_regs {
0041     const struct vga_regset *h_total_regs;
0042     const struct vga_regset *h_display_regs;
0043     const struct vga_regset *h_blank_start_regs;
0044     const struct vga_regset *h_blank_end_regs;
0045     const struct vga_regset *h_sync_start_regs;
0046     const struct vga_regset *h_sync_end_regs;
0047
0048     const struct vga_regset *v_total_regs;
0049     const struct vga_regset *v_display_regs;
0050     const struct vga_regset *v_blank_start_regs;
0051     const struct vga_regset *v_blank_end_regs;
0052     const struct vga_regset *v_sync_start_regs;
0053     const struct vga_regset *v_sync_end_regs;
0054 };
0055
0056 struct svga_pll {
0057     u16 m_min;
0058     u16 m_max;
0059     u16 n_min;
0060     u16 n_max;
0061     u16 r_min;
0062     u16 r_max;  /* r_max < 32 */
0063     u32 f_vco_min;
0064     u32 f_vco_max;
0065     u32 f_base;
0066 };
0067
0068
0069 /* Write a value to the attribute register */
0070
0071 static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data)
0072 {
0073     vga_r(regbase, VGA_IS1_RC);
0074     vga_w(regbase, VGA_ATT_IW, index);
0075     vga_w(regbase, VGA_ATT_W, data);
0076 }
0077
0078 /* Write a value to a sequence register with a mask */
0079
0080 static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
0081 {
0082     vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask));
0083 }
0084
0085 /* Write a value to a CRT register with a mask */
0086
0087 static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
0088 {
0089     vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask));
0090 }
0091
0092 static inline int svga_primary_device(struct pci_dev *dev)
0093 {
0094     u16 flags;
0095     pci_read_config_word(dev, PCI_COMMAND, &flags);
0096     return (flags & PCI_COMMAND_IO);
0097 }
0098
0099
0100 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
0101 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
0102
0103 void svga_set_default_gfx_regs(void __iomem *regbase);
0104 void svga_set_default_atc_regs(void __iomem *regbase);
0105 void svga_set_default_seq_regs(void __iomem *regbase);
0106 void svga_set_default_crt_regs(void __iomem *regbase);
0107 void svga_set_textmode_vga_regs(void __iomem *regbase);
0108
0109 void svga_settile(struct fb_info *info, struct fb_tilemap *map);
0110 void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area);
0111 void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect);
0112 void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit);
0113 void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor);
0114 int svga_get_tilemax(struct fb_info *info);
0115 void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps,
0116            struct fb_var_screeninfo *var);
0117
0118 int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node);
0119 int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node);
0120 void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node);
0121
0122 int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix);
0123
0124 #endif /* _LINUX_SVGA_H */
0125