linux/ssb/ssb_driver_gige.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef LINUX_SSB_DRIVER_GIGE_H_
0003 #define LINUX_SSB_DRIVER_GIGE_H_
0004
0005 #include <linux/ssb/ssb.h>
0006 #include <linux/bug.h>
0007 #include <linux/pci.h>
0008 #include <linux/spinlock.h>
0009
0010
0011 #ifdef CONFIG_SSB_DRIVER_GIGE
0012
0013
0014 #define SSB_GIGE_PCIIO          0x0000 /* PCI I/O Registers (1024 bytes) */
0015 #define SSB_GIGE_RESERVED       0x0400 /* Reserved (1024 bytes) */
0016 #define SSB_GIGE_PCICFG         0x0800 /* PCI config space (256 bytes) */
0017 #define SSB_GIGE_SHIM_FLUSHSTAT     0x0C00 /* PCI to OCP: Flush status control (32bit) */
0018 #define SSB_GIGE_SHIM_FLUSHRDA      0x0C04 /* PCI to OCP: Flush read address (32bit) */
0019 #define SSB_GIGE_SHIM_FLUSHTO       0x0C08 /* PCI to OCP: Flush timeout counter (32bit) */
0020 #define SSB_GIGE_SHIM_BARRIER       0x0C0C /* PCI to OCP: Barrier register (32bit) */
0021 #define SSB_GIGE_SHIM_MAOCPSI       0x0C10 /* PCI to OCP: MaocpSI Control (32bit) */
0022 #define SSB_GIGE_SHIM_SIOCPMA       0x0C14 /* PCI to OCP: SiocpMa Control (32bit) */
0023
0024 /* TM Status High flags */
0025 #define SSB_GIGE_TMSHIGH_RGMII      0x00010000 /* Have an RGMII PHY-bus */
0026 /* TM Status Low flags */
0027 #define SSB_GIGE_TMSLOW_TXBYPASS    0x00080000 /* TX bypass (no delay) */
0028 #define SSB_GIGE_TMSLOW_RXBYPASS    0x00100000 /* RX bypass (no delay) */
0029 #define SSB_GIGE_TMSLOW_DLLEN       0x01000000 /* Enable DLL controls */
0030
0031 /* Boardflags (low) */
0032 #define SSB_GIGE_BFL_ROBOSWITCH     0x0010
0033
0034
0035 #define SSB_GIGE_MEM_RES_NAME       "SSB Broadcom 47xx GigE memory"
0036 #define SSB_GIGE_IO_RES_NAME        "SSB Broadcom 47xx GigE I/O"
0037
0038 struct ssb_gige {
0039     struct ssb_device *dev;
0040
0041     spinlock_t lock;
0042
0043     /* True, if the device has an RGMII bus.
0044      * False, if the device has a GMII bus. */
0045     bool has_rgmii;
0046
0047     /* The PCI controller device. */
0048     struct pci_controller pci_controller;
0049     struct pci_ops pci_ops;
0050     struct resource mem_resource;
0051     struct resource io_resource;
0052 };
0053
0054 /* Check whether a PCI device is a SSB Gigabit Ethernet core. */
0055 extern bool pdev_is_ssb_gige_core(struct pci_dev *pdev);
0056
0057 /* Convert a pci_dev pointer to a ssb_gige pointer. */
0058 static inline struct ssb_gige * pdev_to_ssb_gige(struct pci_dev *pdev)
0059 {
0060     if (!pdev_is_ssb_gige_core(pdev))
0061         return NULL;
0062     return container_of(pdev->bus->ops, struct ssb_gige, pci_ops);
0063 }
0064
0065 /* Returns whether the PHY is connected by an RGMII bus. */
0066 static inline bool ssb_gige_is_rgmii(struct pci_dev *pdev)
0067 {
0068     struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
0069     return (dev ? dev->has_rgmii : 0);
0070 }
0071
0072 /* Returns whether we have a Roboswitch. */
0073 static inline bool ssb_gige_have_roboswitch(struct pci_dev *pdev)
0074 {
0075     struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
0076     if (dev)
0077         return !!(dev->dev->bus->sprom.boardflags_lo &
0078               SSB_GIGE_BFL_ROBOSWITCH);
0079     return false;
0080 }
0081
0082 /* Returns whether we can only do one DMA at once. */
0083 static inline bool ssb_gige_one_dma_at_once(struct pci_dev *pdev)
0084 {
0085     struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
0086     if (dev)
0087         return ((dev->dev->bus->chip_id == 0x4785) &&
0088             (dev->dev->bus->chip_rev < 2));
0089     return false;
0090 }
0091
0092 /* Returns whether we must flush posted writes. */
0093 static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
0094 {
0095     struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
0096     if (dev)
0097         return (dev->dev->bus->chip_id == 0x4785);
0098     return false;
0099 }
0100
0101 /* Get the device MAC address */
0102 static inline int ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
0103 {
0104     struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
0105     if (!dev)
0106         return -ENODEV;
0107
0108     memcpy(macaddr, dev->dev->bus->sprom.et0mac, 6);
0109     return 0;
0110 }
0111
0112 /* Get the device phy address */
0113 static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
0114 {
0115     struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
0116     if (!dev)
0117         return -ENODEV;
0118
0119     return dev->dev->bus->sprom.et0phyaddr;
0120 }
0121
0122 extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
0123                       struct pci_dev *pdev);
0124 extern int ssb_gige_map_irq(struct ssb_device *sdev,
0125                 const struct pci_dev *pdev);
0126
0127 /* The GigE driver is not a standalone module, because we don't have support
0128  * for unregistering the driver. So we could not unload the module anyway. */
0129 extern int ssb_gige_init(void);
0130 static inline void ssb_gige_exit(void)
0131 {
0132     /* Currently we can not unregister the GigE driver,
0133      * because we can not unregister the PCI bridge. */
0134     BUG();
0135 }
0136
0137
0138 #else /* CONFIG_SSB_DRIVER_GIGE */
0139 /* Gigabit Ethernet driver disabled */
0140
0141
0142 static inline int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
0143                          struct pci_dev *pdev)
0144 {
0145     return -ENOSYS;
0146 }
0147 static inline int ssb_gige_map_irq(struct ssb_device *sdev,
0148                    const struct pci_dev *pdev)
0149 {
0150     return -ENOSYS;
0151 }
0152 static inline int ssb_gige_init(void)
0153 {
0154     return 0;
0155 }
0156 static inline void ssb_gige_exit(void)
0157 {
0158 }
0159
0160 static inline bool pdev_is_ssb_gige_core(struct pci_dev *pdev)
0161 {
0162     return false;
0163 }
0164 static inline struct ssb_gige * pdev_to_ssb_gige(struct pci_dev *pdev)
0165 {
0166     return NULL;
0167 }
0168 static inline bool ssb_gige_is_rgmii(struct pci_dev *pdev)
0169 {
0170     return false;
0171 }
0172 static inline bool ssb_gige_have_roboswitch(struct pci_dev *pdev)
0173 {
0174     return false;
0175 }
0176 static inline bool ssb_gige_one_dma_at_once(struct pci_dev *pdev)
0177 {
0178     return false;
0179 }
0180 static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
0181 {
0182     return false;
0183 }
0184 static inline int ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
0185 {
0186     return -ENODEV;
0187 }
0188 static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
0189 {
0190     return -ENODEV;
0191 }
0192
0193 #endif /* CONFIG_SSB_DRIVER_GIGE */
0194 #endif /* LINUX_SSB_DRIVER_GIGE_H_ */