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0008 #ifndef __LINUX_SOC_EXYNOS_CHIPID_H
0009 #define __LINUX_SOC_EXYNOS_CHIPID_H
0010
0011 #define EXYNOS_CHIPID_REG_PRO_ID 0x00
0012 #define EXYNOS_REV_PART_MASK 0xf
0013 #define EXYNOS_REV_PART_SHIFT 4
0014 #define EXYNOS_MASK 0xfffff000
0015
0016 #define EXYNOS_CHIPID_REG_PKG_ID 0x04
0017
0018 #define EXYNOS5422_IDS_OFFSET 24
0019 #define EXYNOS5422_IDS_MASK 0xff
0020 #define EXYNOS5422_USESG_OFFSET 3
0021 #define EXYNOS5422_USESG_MASK 0x01
0022 #define EXYNOS5422_SG_OFFSET 0
0023 #define EXYNOS5422_SG_MASK 0x07
0024 #define EXYNOS5422_TABLE_OFFSET 8
0025 #define EXYNOS5422_TABLE_MASK 0x03
0026 #define EXYNOS5422_SG_A_OFFSET 17
0027 #define EXYNOS5422_SG_A_MASK 0x0f
0028 #define EXYNOS5422_SG_B_OFFSET 21
0029 #define EXYNOS5422_SG_B_MASK 0x03
0030 #define EXYNOS5422_SG_BSIGN_OFFSET 23
0031 #define EXYNOS5422_SG_BSIGN_MASK 0x01
0032 #define EXYNOS5422_BIN2_OFFSET 12
0033 #define EXYNOS5422_BIN2_MASK 0x01
0034
0035 #define EXYNOS_CHIPID_REG_LOT_ID 0x14
0036
0037 #define EXYNOS_CHIPID_REG_AUX_INFO 0x1c
0038
0039 #define EXYNOS5422_TMCB_OFFSET 0
0040 #define EXYNOS5422_TMCB_MASK 0x7f
0041 #define EXYNOS5422_ARM_UP_OFFSET 8
0042 #define EXYNOS5422_ARM_UP_MASK 0x03
0043 #define EXYNOS5422_ARM_DN_OFFSET 10
0044 #define EXYNOS5422_ARM_DN_MASK 0x03
0045 #define EXYNOS5422_KFC_UP_OFFSET 12
0046 #define EXYNOS5422_KFC_UP_MASK 0x03
0047 #define EXYNOS5422_KFC_DN_OFFSET 14
0048 #define EXYNOS5422_KFC_DN_MASK 0x03
0049
0050 #endif