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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 /* 0003 * Copyright (c) 2018 MediaTek Inc. 0004 * 0005 */ 0006 0007 #ifndef __MTK_CMDQ_H__ 0008 #define __MTK_CMDQ_H__ 0009 0010 #include <linux/mailbox_client.h> 0011 #include <linux/mailbox/mtk-cmdq-mailbox.h> 0012 #include <linux/timer.h> 0013 0014 #define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) 0015 #define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) 0016 0017 struct cmdq_pkt; 0018 0019 struct cmdq_client_reg { 0020 u8 subsys; 0021 u16 offset; 0022 u16 size; 0023 }; 0024 0025 struct cmdq_client { 0026 struct mbox_client client; 0027 struct mbox_chan *chan; 0028 }; 0029 0030 /** 0031 * cmdq_dev_get_client_reg() - parse cmdq client reg from the device 0032 * node of CMDQ client 0033 * @dev: device of CMDQ mailbox client 0034 * @client_reg: CMDQ client reg pointer 0035 * @idx: the index of desired reg 0036 * 0037 * Return: 0 for success; else the error code is returned 0038 * 0039 * Help CMDQ client parsing the cmdq client reg 0040 * from the device node of CMDQ client. 0041 */ 0042 int cmdq_dev_get_client_reg(struct device *dev, 0043 struct cmdq_client_reg *client_reg, int idx); 0044 0045 /** 0046 * cmdq_mbox_create() - create CMDQ mailbox client and channel 0047 * @dev: device of CMDQ mailbox client 0048 * @index: index of CMDQ mailbox channel 0049 * 0050 * Return: CMDQ mailbox client pointer 0051 */ 0052 struct cmdq_client *cmdq_mbox_create(struct device *dev, int index); 0053 0054 /** 0055 * cmdq_mbox_destroy() - destroy CMDQ mailbox client and channel 0056 * @client: the CMDQ mailbox client 0057 */ 0058 void cmdq_mbox_destroy(struct cmdq_client *client); 0059 0060 /** 0061 * cmdq_pkt_create() - create a CMDQ packet 0062 * @client: the CMDQ mailbox client 0063 * @size: required CMDQ buffer size 0064 * 0065 * Return: CMDQ packet pointer 0066 */ 0067 struct cmdq_pkt *cmdq_pkt_create(struct cmdq_client *client, size_t size); 0068 0069 /** 0070 * cmdq_pkt_destroy() - destroy the CMDQ packet 0071 * @pkt: the CMDQ packet 0072 */ 0073 void cmdq_pkt_destroy(struct cmdq_pkt *pkt); 0074 0075 /** 0076 * cmdq_pkt_write() - append write command to the CMDQ packet 0077 * @pkt: the CMDQ packet 0078 * @subsys: the CMDQ sub system code 0079 * @offset: register offset from CMDQ sub system 0080 * @value: the specified target register value 0081 * 0082 * Return: 0 for success; else the error code is returned 0083 */ 0084 int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); 0085 0086 /** 0087 * cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet 0088 * @pkt: the CMDQ packet 0089 * @subsys: the CMDQ sub system code 0090 * @offset: register offset from CMDQ sub system 0091 * @value: the specified target register value 0092 * @mask: the specified target register mask 0093 * 0094 * Return: 0 for success; else the error code is returned 0095 */ 0096 int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, 0097 u16 offset, u32 value, u32 mask); 0098 0099 /* 0100 * cmdq_pkt_read_s() - append read_s command to the CMDQ packet 0101 * @pkt: the CMDQ packet 0102 * @high_addr_reg_idx: internal register ID which contains high address of pa 0103 * @addr_low: low address of pa 0104 * @reg_idx: the CMDQ internal register ID to cache read data 0105 * 0106 * Return: 0 for success; else the error code is returned 0107 */ 0108 int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low, 0109 u16 reg_idx); 0110 0111 /** 0112 * cmdq_pkt_write_s() - append write_s command to the CMDQ packet 0113 * @pkt: the CMDQ packet 0114 * @high_addr_reg_idx: internal register ID which contains high address of pa 0115 * @addr_low: low address of pa 0116 * @src_reg_idx: the CMDQ internal register ID which cache source value 0117 * 0118 * Return: 0 for success; else the error code is returned 0119 * 0120 * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH() 0121 * to get high address and call cmdq_pkt_assign() to assign value into internal 0122 * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when 0123 * call to this function. 0124 */ 0125 int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, 0126 u16 addr_low, u16 src_reg_idx); 0127 0128 /** 0129 * cmdq_pkt_write_s_mask() - append write_s with mask command to the CMDQ packet 0130 * @pkt: the CMDQ packet 0131 * @high_addr_reg_idx: internal register ID which contains high address of pa 0132 * @addr_low: low address of pa 0133 * @src_reg_idx: the CMDQ internal register ID which cache source value 0134 * @mask: the specified target address mask, use U32_MAX if no need 0135 * 0136 * Return: 0 for success; else the error code is returned 0137 * 0138 * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH() 0139 * to get high address and call cmdq_pkt_assign() to assign value into internal 0140 * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when 0141 * call to this function. 0142 */ 0143 int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, 0144 u16 addr_low, u16 src_reg_idx, u32 mask); 0145 0146 /** 0147 * cmdq_pkt_write_s_value() - append write_s command to the CMDQ packet which 0148 * write value to a physical address 0149 * @pkt: the CMDQ packet 0150 * @high_addr_reg_idx: internal register ID which contains high address of pa 0151 * @addr_low: low address of pa 0152 * @value: the specified target value 0153 * 0154 * Return: 0 for success; else the error code is returned 0155 */ 0156 int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, 0157 u16 addr_low, u32 value); 0158 0159 /** 0160 * cmdq_pkt_write_s_mask_value() - append write_s command with mask to the CMDQ 0161 * packet which write value to a physical 0162 * address 0163 * @pkt: the CMDQ packet 0164 * @high_addr_reg_idx: internal register ID which contains high address of pa 0165 * @addr_low: low address of pa 0166 * @value: the specified target value 0167 * @mask: the specified target mask 0168 * 0169 * Return: 0 for success; else the error code is returned 0170 */ 0171 int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, 0172 u16 addr_low, u32 value, u32 mask); 0173 0174 /** 0175 * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet 0176 * @pkt: the CMDQ packet 0177 * @event: the desired event type to wait 0178 * @clear: clear event or not after event arrive 0179 * 0180 * Return: 0 for success; else the error code is returned 0181 */ 0182 int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear); 0183 0184 /** 0185 * cmdq_pkt_clear_event() - append clear event command to the CMDQ packet 0186 * @pkt: the CMDQ packet 0187 * @event: the desired event to be cleared 0188 * 0189 * Return: 0 for success; else the error code is returned 0190 */ 0191 int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event); 0192 0193 /** 0194 * cmdq_pkt_set_event() - append set event command to the CMDQ packet 0195 * @pkt: the CMDQ packet 0196 * @event: the desired event to be set 0197 * 0198 * Return: 0 for success; else the error code is returned 0199 */ 0200 int cmdq_pkt_set_event(struct cmdq_pkt *pkt, u16 event); 0201 0202 /** 0203 * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to 0204 * execute an instruction that wait for a specified 0205 * hardware register to check for the value w/o mask. 0206 * All GCE hardware threads will be blocked by this 0207 * instruction. 0208 * @pkt: the CMDQ packet 0209 * @subsys: the CMDQ sub system code 0210 * @offset: register offset from CMDQ sub system 0211 * @value: the specified target register value 0212 * 0213 * Return: 0 for success; else the error code is returned 0214 */ 0215 int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys, 0216 u16 offset, u32 value); 0217 0218 /** 0219 * cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to 0220 * execute an instruction that wait for a specified 0221 * hardware register to check for the value w/ mask. 0222 * All GCE hardware threads will be blocked by this 0223 * instruction. 0224 * @pkt: the CMDQ packet 0225 * @subsys: the CMDQ sub system code 0226 * @offset: register offset from CMDQ sub system 0227 * @value: the specified target register value 0228 * @mask: the specified target register mask 0229 * 0230 * Return: 0 for success; else the error code is returned 0231 */ 0232 int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, 0233 u16 offset, u32 value, u32 mask); 0234 0235 /** 0236 * cmdq_pkt_assign() - Append logic assign command to the CMDQ packet, ask GCE 0237 * to execute an instruction that set a constant value into 0238 * internal register and use as value, mask or address in 0239 * read/write instruction. 0240 * @pkt: the CMDQ packet 0241 * @reg_idx: the CMDQ internal register ID 0242 * @value: the specified value 0243 * 0244 * Return: 0 for success; else the error code is returned 0245 */ 0246 int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value); 0247 0248 /** 0249 * cmdq_pkt_jump() - Append jump command to the CMDQ packet, ask GCE 0250 * to execute an instruction that change current thread PC to 0251 * a physical address which should contains more instruction. 0252 * @pkt: the CMDQ packet 0253 * @addr: physical address of target instruction buffer 0254 * 0255 * Return: 0 for success; else the error code is returned 0256 */ 0257 int cmdq_pkt_jump(struct cmdq_pkt *pkt, dma_addr_t addr); 0258 0259 /** 0260 * cmdq_pkt_finalize() - Append EOC and jump command to pkt. 0261 * @pkt: the CMDQ packet 0262 * 0263 * Return: 0 for success; else the error code is returned 0264 */ 0265 int cmdq_pkt_finalize(struct cmdq_pkt *pkt); 0266 0267 /** 0268 * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ 0269 * packet and call back at the end of done packet 0270 * @pkt: the CMDQ packet 0271 * 0272 * Return: 0 for success; else the error code is returned 0273 * 0274 * Trigger CMDQ to asynchronously execute the CMDQ packet and call back 0275 * at the end of done packet. Note that this is an ASYNC function. When the 0276 * function returned, it may or may not be finished. 0277 */ 0278 int cmdq_pkt_flush_async(struct cmdq_pkt *pkt); 0279 0280 #endif /* __MTK_CMDQ_H__ */
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