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0008
0009 extern int sm501_unit_power(struct device *dev,
0010 unsigned int unit, unsigned int to);
0011
0012 extern unsigned long sm501_set_clock(struct device *dev,
0013 int clksrc, unsigned long freq);
0014
0015 extern unsigned long sm501_find_clock(struct device *dev,
0016 int clksrc, unsigned long req_freq);
0017
0018
0019
0020
0021
0022
0023 extern int sm501_misc_control(struct device *dev,
0024 unsigned long set, unsigned long clear);
0025
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0028
0029
0030
0031
0032 extern unsigned long sm501_modify_reg(struct device *dev,
0033 unsigned long reg,
0034 unsigned long set,
0035 unsigned long clear);
0036
0037
0038
0039
0040 #define SM501FB_FLAG_USE_INIT_MODE (1<<0)
0041 #define SM501FB_FLAG_DISABLE_AT_EXIT (1<<1)
0042 #define SM501FB_FLAG_USE_HWCURSOR (1<<2)
0043 #define SM501FB_FLAG_USE_HWACCEL (1<<3)
0044 #define SM501FB_FLAG_PANEL_NO_FPEN (1<<4)
0045 #define SM501FB_FLAG_PANEL_NO_VBIASEN (1<<5)
0046 #define SM501FB_FLAG_PANEL_INV_FPEN (1<<6)
0047 #define SM501FB_FLAG_PANEL_INV_VBIASEN (1<<7)
0048
0049 struct sm501_platdata_fbsub {
0050 struct fb_videomode *def_mode;
0051 unsigned int def_bpp;
0052 unsigned long max_mem;
0053 unsigned int flags;
0054 };
0055
0056 enum sm501_fb_routing {
0057 SM501_FB_OWN = 0,
0058 SM501_FB_CRT_PANEL = 1,
0059 };
0060
0061
0062
0063 #define SM501_FBPD_SWAP_FB_ENDIAN (1<<0)
0064
0065
0066
0067
0068
0069
0070 struct sm501_platdata_fb {
0071 enum sm501_fb_routing fb_route;
0072 unsigned int flags;
0073 struct sm501_platdata_fbsub *fb_crt;
0074 struct sm501_platdata_fbsub *fb_pnl;
0075 };
0076
0077
0078
0079
0080
0081
0082
0083
0084 struct sm501_platdata_gpio_i2c {
0085 unsigned int bus_num;
0086 unsigned int pin_sda;
0087 unsigned int pin_scl;
0088 int udelay;
0089 int timeout;
0090 };
0091
0092
0093
0094
0095
0096
0097
0098 struct sm501_reg_init {
0099 unsigned long set;
0100 unsigned long mask;
0101 };
0102
0103 #define SM501_USE_USB_HOST (1<<0)
0104 #define SM501_USE_USB_SLAVE (1<<1)
0105 #define SM501_USE_SSP0 (1<<2)
0106 #define SM501_USE_SSP1 (1<<3)
0107 #define SM501_USE_UART0 (1<<4)
0108 #define SM501_USE_UART1 (1<<5)
0109 #define SM501_USE_FBACCEL (1<<6)
0110 #define SM501_USE_AC97 (1<<7)
0111 #define SM501_USE_I2S (1<<8)
0112 #define SM501_USE_GPIO (1<<9)
0113
0114 #define SM501_USE_ALL (0xffffffff)
0115
0116 struct sm501_initdata {
0117 struct sm501_reg_init gpio_low;
0118 struct sm501_reg_init gpio_high;
0119 struct sm501_reg_init misc_timing;
0120 struct sm501_reg_init misc_control;
0121
0122 unsigned long devices;
0123 unsigned long mclk;
0124 unsigned long m1xclk;
0125 };
0126
0127
0128
0129
0130
0131
0132 struct sm501_init_gpio {
0133 struct sm501_reg_init gpio_data_low;
0134 struct sm501_reg_init gpio_data_high;
0135 struct sm501_reg_init gpio_ddr_low;
0136 struct sm501_reg_init gpio_ddr_high;
0137 };
0138
0139 #define SM501_FLAG_SUSPEND_OFF (1<<4)
0140
0141
0142
0143
0144
0145
0146
0147
0148
0149 struct sm501_platdata {
0150 struct sm501_initdata *init;
0151 struct sm501_init_gpio *init_gpiop;
0152 struct sm501_platdata_fb *fb;
0153
0154 int flags;
0155 int gpio_base;
0156
0157 int (*get_power)(struct device *dev);
0158 int (*set_power)(struct device *dev, unsigned int on);
0159
0160 struct sm501_platdata_gpio_i2c *gpio_i2c;
0161 unsigned int gpio_i2c_nr;
0162 };
0163
0164 #if defined(CONFIG_PPC32)
0165 #define smc501_readl(addr) ioread32be((addr))
0166 #define smc501_writel(val, addr) iowrite32be((val), (addr))
0167 #else
0168 #define smc501_readl(addr) readl(addr)
0169 #define smc501_writel(val, addr) writel(val, addr)
0170 #endif