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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __SH_INTC_H
0003 #define __SH_INTC_H
0004 
0005 #include <linux/ioport.h>
0006 
0007 #ifdef CONFIG_SUPERH
0008 #define INTC_NR_IRQS    512
0009 #else
0010 #define INTC_NR_IRQS    1024
0011 #endif
0012 
0013 /*
0014  * Convert back and forth between INTEVT and IRQ values.
0015  */
0016 #ifdef CONFIG_CPU_HAS_INTEVT
0017 #define evt2irq(evt)        (((evt) >> 5) - 16)
0018 #define irq2evt(irq)        (((irq) + 16) << 5)
0019 #else
0020 #define evt2irq(evt)        (evt)
0021 #define irq2evt(irq)        (irq)
0022 #endif
0023 
0024 typedef unsigned char intc_enum;
0025 
0026 struct intc_vect {
0027     intc_enum enum_id;
0028     unsigned short vect;
0029 };
0030 
0031 #define INTC_VECT(enum_id, vect) { enum_id, vect }
0032 #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
0033 
0034 struct intc_group {
0035     intc_enum enum_id;
0036     intc_enum enum_ids[32];
0037 };
0038 
0039 #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
0040 
0041 struct intc_subgroup {
0042     unsigned long reg, reg_width;
0043     intc_enum parent_id;
0044     intc_enum enum_ids[32];
0045 };
0046 
0047 struct intc_mask_reg {
0048     unsigned long set_reg, clr_reg, reg_width;
0049     intc_enum enum_ids[32];
0050 #ifdef CONFIG_INTC_BALANCING
0051     unsigned long dist_reg;
0052 #endif
0053 #ifdef CONFIG_SMP
0054     unsigned long smp;
0055 #endif
0056 };
0057 
0058 struct intc_prio_reg {
0059     unsigned long set_reg, clr_reg, reg_width, field_width;
0060     intc_enum enum_ids[16];
0061 #ifdef CONFIG_SMP
0062     unsigned long smp;
0063 #endif
0064 };
0065 
0066 struct intc_sense_reg {
0067     unsigned long reg, reg_width, field_width;
0068     intc_enum enum_ids[16];
0069 };
0070 
0071 #ifdef CONFIG_INTC_BALANCING
0072 #define INTC_SMP_BALANCING(reg) .dist_reg = (reg)
0073 #else
0074 #define INTC_SMP_BALANCING(reg)
0075 #endif
0076 
0077 #ifdef CONFIG_SMP
0078 #define INTC_SMP(stride, nr)    .smp = (stride) | ((nr) << 8)
0079 #else
0080 #define INTC_SMP(stride, nr)
0081 #endif
0082 
0083 struct intc_hw_desc {
0084     struct intc_vect *vectors;
0085     unsigned int nr_vectors;
0086     struct intc_group *groups;
0087     unsigned int nr_groups;
0088     struct intc_mask_reg *mask_regs;
0089     unsigned int nr_mask_regs;
0090     struct intc_prio_reg *prio_regs;
0091     unsigned int nr_prio_regs;
0092     struct intc_sense_reg *sense_regs;
0093     unsigned int nr_sense_regs;
0094     struct intc_mask_reg *ack_regs;
0095     unsigned int nr_ack_regs;
0096     struct intc_subgroup *subgroups;
0097     unsigned int nr_subgroups;
0098 };
0099 
0100 #define _INTC_ARRAY(a) a, __same_type(a, NULL) ? 0 : sizeof(a)/sizeof(*a)
0101 
0102 #define INTC_HW_DESC(vectors, groups, mask_regs,    \
0103              prio_regs, sense_regs, ack_regs)   \
0104 {                           \
0105     _INTC_ARRAY(vectors), _INTC_ARRAY(groups),  \
0106     _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
0107     _INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
0108 }
0109 
0110 struct intc_desc {
0111     char *name;
0112     struct resource *resource;
0113     unsigned int num_resources;
0114     intc_enum force_enable;
0115     intc_enum force_disable;
0116     bool skip_syscore_suspend;
0117     struct intc_hw_desc hw;
0118 };
0119 
0120 #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups,        \
0121     mask_regs, prio_regs, sense_regs)               \
0122 struct intc_desc symbol __initdata = {                  \
0123     .name = chipname,                       \
0124     .hw = INTC_HW_DESC(vectors, groups, mask_regs,          \
0125                prio_regs, sense_regs, NULL),        \
0126 }
0127 
0128 #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups,    \
0129     mask_regs, prio_regs, sense_regs, ack_regs)         \
0130 struct intc_desc symbol __initdata = {                  \
0131     .name = chipname,                       \
0132     .hw = INTC_HW_DESC(vectors, groups, mask_regs,          \
0133                prio_regs, sense_regs, ack_regs),        \
0134 }
0135 
0136 int register_intc_controller(struct intc_desc *desc);
0137 int intc_set_priority(unsigned int irq, unsigned int prio);
0138 int intc_irq_lookup(const char *chipname, intc_enum enum_id);
0139 void intc_finalize(void);
0140 
0141 #ifdef CONFIG_INTC_USERIMASK
0142 int register_intc_userimask(unsigned long addr);
0143 #else
0144 static inline int register_intc_userimask(unsigned long addr)
0145 {
0146     return 0;
0147 }
0148 #endif
0149 
0150 #endif /* __SH_INTC_H */