0001
0002 #ifndef __LINUX_SERIAL_SCI_H
0003 #define __LINUX_SERIAL_SCI_H
0004
0005 #include <linux/bitops.h>
0006 #include <linux/serial_core.h>
0007 #include <linux/sh_dma.h>
0008
0009
0010
0011
0012
0013
0014 #define SCSCR_TIE BIT(7)
0015 #define SCSCR_RIE BIT(6)
0016 #define SCSCR_TE BIT(5)
0017 #define SCSCR_RE BIT(4)
0018 #define SCSCR_REIE BIT(3)
0019 #define SCSCR_TOIE BIT(2)
0020 #define SCSCR_CKE1 BIT(1)
0021 #define SCSCR_CKE0 BIT(0)
0022
0023
0024 enum {
0025 SCIx_PROBE_REGTYPE,
0026
0027 SCIx_SCI_REGTYPE,
0028 SCIx_IRDA_REGTYPE,
0029 SCIx_SCIFA_REGTYPE,
0030 SCIx_SCIFB_REGTYPE,
0031 SCIx_SH2_SCIF_FIFODATA_REGTYPE,
0032 SCIx_SH3_SCIF_REGTYPE,
0033 SCIx_SH4_SCIF_REGTYPE,
0034 SCIx_SH4_SCIF_BRG_REGTYPE,
0035 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
0036 SCIx_SH4_SCIF_FIFODATA_REGTYPE,
0037 SCIx_SH7705_SCIF_REGTYPE,
0038 SCIx_HSCIF_REGTYPE,
0039 SCIx_RZ_SCIFA_REGTYPE,
0040
0041 SCIx_NR_REGTYPES,
0042 };
0043
0044 struct plat_sci_port_ops {
0045 void (*init_pins)(struct uart_port *, unsigned int cflag);
0046 };
0047
0048
0049
0050
0051 struct plat_sci_port {
0052 unsigned int type;
0053 upf_t flags;
0054
0055 unsigned int sampling_rate;
0056 unsigned int scscr;
0057
0058
0059
0060
0061 unsigned char regtype;
0062
0063 struct plat_sci_port_ops *ops;
0064 };
0065
0066 #endif