0001
0002 #ifndef _LINUX_SERIAL_BCM63XX_H
0003 #define _LINUX_SERIAL_BCM63XX_H
0004
0005
0006 #define UART_CTL_REG 0x0
0007 #define UART_CTL_RXTMOUTCNT_SHIFT 0
0008 #define UART_CTL_RXTMOUTCNT_MASK (0x1f << UART_CTL_RXTMOUTCNT_SHIFT)
0009 #define UART_CTL_RSTTXDN_SHIFT 5
0010 #define UART_CTL_RSTTXDN_MASK (1 << UART_CTL_RSTTXDN_SHIFT)
0011 #define UART_CTL_RSTRXFIFO_SHIFT 6
0012 #define UART_CTL_RSTRXFIFO_MASK (1 << UART_CTL_RSTRXFIFO_SHIFT)
0013 #define UART_CTL_RSTTXFIFO_SHIFT 7
0014 #define UART_CTL_RSTTXFIFO_MASK (1 << UART_CTL_RSTTXFIFO_SHIFT)
0015 #define UART_CTL_STOPBITS_SHIFT 8
0016 #define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT)
0017 #define UART_CTL_STOPBITS_1 (0x7 << UART_CTL_STOPBITS_SHIFT)
0018 #define UART_CTL_STOPBITS_2 (0xf << UART_CTL_STOPBITS_SHIFT)
0019 #define UART_CTL_BITSPERSYM_SHIFT 12
0020 #define UART_CTL_BITSPERSYM_MASK (0x3 << UART_CTL_BITSPERSYM_SHIFT)
0021 #define UART_CTL_XMITBRK_SHIFT 14
0022 #define UART_CTL_XMITBRK_MASK (1 << UART_CTL_XMITBRK_SHIFT)
0023 #define UART_CTL_RSVD_SHIFT 15
0024 #define UART_CTL_RSVD_MASK (1 << UART_CTL_RSVD_SHIFT)
0025 #define UART_CTL_RXPAREVEN_SHIFT 16
0026 #define UART_CTL_RXPAREVEN_MASK (1 << UART_CTL_RXPAREVEN_SHIFT)
0027 #define UART_CTL_RXPAREN_SHIFT 17
0028 #define UART_CTL_RXPAREN_MASK (1 << UART_CTL_RXPAREN_SHIFT)
0029 #define UART_CTL_TXPAREVEN_SHIFT 18
0030 #define UART_CTL_TXPAREVEN_MASK (1 << UART_CTL_TXPAREVEN_SHIFT)
0031 #define UART_CTL_TXPAREN_SHIFT 18
0032 #define UART_CTL_TXPAREN_MASK (1 << UART_CTL_TXPAREN_SHIFT)
0033 #define UART_CTL_LOOPBACK_SHIFT 20
0034 #define UART_CTL_LOOPBACK_MASK (1 << UART_CTL_LOOPBACK_SHIFT)
0035 #define UART_CTL_RXEN_SHIFT 21
0036 #define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT)
0037 #define UART_CTL_TXEN_SHIFT 22
0038 #define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT)
0039 #define UART_CTL_BRGEN_SHIFT 23
0040 #define UART_CTL_BRGEN_MASK (1 << UART_CTL_BRGEN_SHIFT)
0041
0042
0043 #define UART_BAUD_REG 0x4
0044
0045
0046 #define UART_MCTL_REG 0x8
0047 #define UART_MCTL_DTR_SHIFT 0
0048 #define UART_MCTL_DTR_MASK (1 << UART_MCTL_DTR_SHIFT)
0049 #define UART_MCTL_RTS_SHIFT 1
0050 #define UART_MCTL_RTS_MASK (1 << UART_MCTL_RTS_SHIFT)
0051 #define UART_MCTL_RXFIFOTHRESH_SHIFT 8
0052 #define UART_MCTL_RXFIFOTHRESH_MASK (0xf << UART_MCTL_RXFIFOTHRESH_SHIFT)
0053 #define UART_MCTL_TXFIFOTHRESH_SHIFT 12
0054 #define UART_MCTL_TXFIFOTHRESH_MASK (0xf << UART_MCTL_TXFIFOTHRESH_SHIFT)
0055 #define UART_MCTL_RXFIFOFILL_SHIFT 16
0056 #define UART_MCTL_RXFIFOFILL_MASK (0x1f << UART_MCTL_RXFIFOFILL_SHIFT)
0057 #define UART_MCTL_TXFIFOFILL_SHIFT 24
0058 #define UART_MCTL_TXFIFOFILL_MASK (0x1f << UART_MCTL_TXFIFOFILL_SHIFT)
0059
0060
0061 #define UART_EXTINP_REG 0xc
0062 #define UART_EXTINP_RI_SHIFT 0
0063 #define UART_EXTINP_RI_MASK (1 << UART_EXTINP_RI_SHIFT)
0064 #define UART_EXTINP_CTS_SHIFT 1
0065 #define UART_EXTINP_CTS_MASK (1 << UART_EXTINP_CTS_SHIFT)
0066 #define UART_EXTINP_DCD_SHIFT 2
0067 #define UART_EXTINP_DCD_MASK (1 << UART_EXTINP_DCD_SHIFT)
0068 #define UART_EXTINP_DSR_SHIFT 3
0069 #define UART_EXTINP_DSR_MASK (1 << UART_EXTINP_DSR_SHIFT)
0070 #define UART_EXTINP_IRSTAT(x) (1 << (x + 4))
0071 #define UART_EXTINP_IRMASK(x) (1 << (x + 8))
0072 #define UART_EXTINP_IR_RI 0
0073 #define UART_EXTINP_IR_CTS 1
0074 #define UART_EXTINP_IR_DCD 2
0075 #define UART_EXTINP_IR_DSR 3
0076 #define UART_EXTINP_RI_NOSENSE_SHIFT 16
0077 #define UART_EXTINP_RI_NOSENSE_MASK (1 << UART_EXTINP_RI_NOSENSE_SHIFT)
0078 #define UART_EXTINP_CTS_NOSENSE_SHIFT 17
0079 #define UART_EXTINP_CTS_NOSENSE_MASK (1 << UART_EXTINP_CTS_NOSENSE_SHIFT)
0080 #define UART_EXTINP_DCD_NOSENSE_SHIFT 18
0081 #define UART_EXTINP_DCD_NOSENSE_MASK (1 << UART_EXTINP_DCD_NOSENSE_SHIFT)
0082 #define UART_EXTINP_DSR_NOSENSE_SHIFT 19
0083 #define UART_EXTINP_DSR_NOSENSE_MASK (1 << UART_EXTINP_DSR_NOSENSE_SHIFT)
0084
0085
0086 #define UART_IR_REG 0x10
0087 #define UART_IR_MASK(x) (1 << (x + 16))
0088 #define UART_IR_STAT(x) (1 << (x))
0089 #define UART_IR_EXTIP 0
0090 #define UART_IR_TXUNDER 1
0091 #define UART_IR_TXOVER 2
0092 #define UART_IR_TXTRESH 3
0093 #define UART_IR_TXRDLATCH 4
0094 #define UART_IR_TXEMPTY 5
0095 #define UART_IR_RXUNDER 6
0096 #define UART_IR_RXOVER 7
0097 #define UART_IR_RXTIMEOUT 8
0098 #define UART_IR_RXFULL 9
0099 #define UART_IR_RXTHRESH 10
0100 #define UART_IR_RXNOTEMPTY 11
0101 #define UART_IR_RXFRAMEERR 12
0102 #define UART_IR_RXPARERR 13
0103 #define UART_IR_RXBRK 14
0104 #define UART_IR_TXDONE 15
0105
0106
0107 #define UART_FIFO_REG 0x14
0108 #define UART_FIFO_VALID_SHIFT 0
0109 #define UART_FIFO_VALID_MASK 0xff
0110 #define UART_FIFO_FRAMEERR_SHIFT 8
0111 #define UART_FIFO_FRAMEERR_MASK (1 << UART_FIFO_FRAMEERR_SHIFT)
0112 #define UART_FIFO_PARERR_SHIFT 9
0113 #define UART_FIFO_PARERR_MASK (1 << UART_FIFO_PARERR_SHIFT)
0114 #define UART_FIFO_BRKDET_SHIFT 10
0115 #define UART_FIFO_BRKDET_MASK (1 << UART_FIFO_BRKDET_SHIFT)
0116 #define UART_FIFO_ANYERR_MASK (UART_FIFO_FRAMEERR_MASK | \
0117 UART_FIFO_PARERR_MASK | \
0118 UART_FIFO_BRKDET_MASK)
0119
0120 #endif