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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* linux/include/linux/scx200.h
0003 
0004    Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
0005 
0006    Defines for the National Semiconductor SCx200 Processors
0007 */
0008 
0009 /* Interesting stuff for the National Semiconductor SCx200 CPU */
0010 
0011 extern unsigned scx200_cb_base;
0012 
0013 #define scx200_cb_present() (scx200_cb_base!=0)
0014 
0015 /* F0 PCI Header/Bridge Configuration Registers */
0016 #define SCx200_DOCCS_BASE 0x78  /* DOCCS Base Address Register */
0017 #define SCx200_DOCCS_CTRL 0x7c  /* DOCCS Control Register */
0018 
0019 /* GPIO Register Block */
0020 #define SCx200_GPIO_SIZE 0x2c   /* Size of GPIO register block */
0021 
0022 /* General Configuration Block */
0023 #define SCx200_CB_BASE_FIXED 0x9000 /* Base fixed at 0x9000 according to errata? */
0024 
0025 /* Watchdog Timer */
0026 #define SCx200_WDT_OFFSET 0x00  /* offset within configuration block */
0027 #define SCx200_WDT_SIZE 0x05    /* size */
0028 
0029 #define SCx200_WDT_WDTO 0x00    /* Time-Out Register */
0030 #define SCx200_WDT_WDCNFG 0x02  /* Configuration Register */
0031 #define SCx200_WDT_WDSTS 0x04   /* Status Register */
0032 #define SCx200_WDT_WDSTS_WDOVF (1<<0) /* Overflow bit */
0033 
0034 /* High Resolution Timer */
0035 #define SCx200_TIMER_OFFSET 0x08
0036 #define SCx200_TIMER_SIZE 0x06
0037 
0038 /* Clock Generators */
0039 #define SCx200_CLOCKGEN_OFFSET 0x10
0040 #define SCx200_CLOCKGEN_SIZE 0x10
0041 
0042 /* Pin Multiplexing and Miscellaneous Configuration Registers */
0043 #define SCx200_MISC_OFFSET 0x30
0044 #define SCx200_MISC_SIZE 0x10
0045 
0046 #define SCx200_PMR 0x30     /* Pin Multiplexing Register */
0047 #define SCx200_MCR 0x34     /* Miscellaneous Configuration Register */
0048 #define SCx200_INTSEL 0x38  /* Interrupt Selection Register */
0049 #define SCx200_IID 0x3c     /* IA On a Chip Identification Number Reg */
0050 #define SCx200_REV 0x3d     /* Revision Register */
0051 #define SCx200_CBA 0x3e     /* Configuration Base Address Register */
0052 #define SCx200_CBA_SCRATCH 0x64 /* Configuration Base Address Scratchpad */