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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */ 0002 /* 0003 * tps51632-regulator.h -- TPS51632 regulator 0004 * 0005 * Interface for regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down 0006 * Driverless Controller with serial VID control and DVFS. 0007 * 0008 * Copyright (C) 2012 NVIDIA Corporation 0009 0010 * Author: Laxman Dewangan <ldewangan@nvidia.com> 0011 */ 0012 0013 #ifndef __LINUX_REGULATOR_TPS51632_H 0014 #define __LINUX_REGULATOR_TPS51632_H 0015 0016 /* 0017 * struct tps51632_regulator_platform_data - tps51632 regulator platform data. 0018 * 0019 * @reg_init_data: The regulator init data. 0020 * @enable_pwm_dvfs: Enable PWM DVFS or not. 0021 * @dvfs_step_20mV: Step for DVFS is 20mV or 10mV. 0022 * @max_voltage_uV: Maximum possible voltage in PWM-DVFS mode. 0023 * @base_voltage_uV: Base voltage when PWM-DVFS enabled. 0024 */ 0025 struct tps51632_regulator_platform_data { 0026 struct regulator_init_data *reg_init_data; 0027 bool enable_pwm_dvfs; 0028 bool dvfs_step_20mV; 0029 int max_voltage_uV; 0030 int base_voltage_uV; 0031 }; 0032 0033 #endif /* __LINUX_REGULATOR_TPS51632_H */
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