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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2021 MediaTek Inc.
0004  */
0005 
0006 #ifndef __LINUX_REGULATOR_MT6315_H
0007 #define __LINUX_REGULATOR_MT6315_H
0008 
0009 #define MT6315_RP   3
0010 #define MT6315_PP   6
0011 #define MT6315_SP   7
0012 
0013 enum {
0014     MT6315_VBUCK1 = 0,
0015     MT6315_VBUCK2,
0016     MT6315_VBUCK3,
0017     MT6315_VBUCK4,
0018     MT6315_VBUCK_MAX,
0019 };
0020 
0021 /* Register */
0022 #define MT6315_TOP2_ELR7            0x139
0023 #define MT6315_TOP_TMA_KEY          0x39F
0024 #define MT6315_TOP_TMA_KEY_H            0x3A0
0025 #define MT6315_BUCK_TOP_CON0            0x1440
0026 #define MT6315_BUCK_TOP_CON1            0x1443
0027 #define MT6315_BUCK_TOP_ELR0            0x1449
0028 #define MT6315_BUCK_TOP_ELR2            0x144B
0029 #define MT6315_BUCK_TOP_ELR4            0x144D
0030 #define MT6315_BUCK_TOP_ELR6            0x144F
0031 #define MT6315_VBUCK1_DBG0          0x1499
0032 #define MT6315_VBUCK1_DBG4          0x149D
0033 #define MT6315_VBUCK2_DBG0          0x1519
0034 #define MT6315_VBUCK2_DBG4          0x151D
0035 #define MT6315_VBUCK3_DBG0          0x1599
0036 #define MT6315_VBUCK3_DBG4          0x159D
0037 #define MT6315_VBUCK4_DBG0          0x1619
0038 #define MT6315_VBUCK4_DBG4          0x161D
0039 #define MT6315_BUCK_TOP_4PHASE_ANA_CON42    0x16B1
0040 
0041 #define PROTECTION_KEY_H            0x9C
0042 #define PROTECTION_KEY              0xEA
0043 
0044 #endif /* __LINUX_REGULATOR_MT6315_H */