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0009 #ifndef REGULATOR_MAX8952
0010 #define REGULATOR_MAX8952
0011
0012 #include <linux/regulator/machine.h>
0013
0014 enum {
0015 MAX8952_DVS_MODE0,
0016 MAX8952_DVS_MODE1,
0017 MAX8952_DVS_MODE2,
0018 MAX8952_DVS_MODE3,
0019 };
0020
0021 enum {
0022 MAX8952_DVS_770mV = 0,
0023 MAX8952_DVS_780mV,
0024 MAX8952_DVS_790mV,
0025 MAX8952_DVS_800mV,
0026 MAX8952_DVS_810mV,
0027 MAX8952_DVS_820mV,
0028 MAX8952_DVS_830mV,
0029 MAX8952_DVS_840mV,
0030 MAX8952_DVS_850mV,
0031 MAX8952_DVS_860mV,
0032 MAX8952_DVS_870mV,
0033 MAX8952_DVS_880mV,
0034 MAX8952_DVS_890mV,
0035 MAX8952_DVS_900mV,
0036 MAX8952_DVS_910mV,
0037 MAX8952_DVS_920mV,
0038 MAX8952_DVS_930mV,
0039 MAX8952_DVS_940mV,
0040 MAX8952_DVS_950mV,
0041 MAX8952_DVS_960mV,
0042 MAX8952_DVS_970mV,
0043 MAX8952_DVS_980mV,
0044 MAX8952_DVS_990mV,
0045 MAX8952_DVS_1000mV,
0046 MAX8952_DVS_1010mV,
0047 MAX8952_DVS_1020mV,
0048 MAX8952_DVS_1030mV,
0049 MAX8952_DVS_1040mV,
0050 MAX8952_DVS_1050mV,
0051 MAX8952_DVS_1060mV,
0052 MAX8952_DVS_1070mV,
0053 MAX8952_DVS_1080mV,
0054 MAX8952_DVS_1090mV,
0055 MAX8952_DVS_1100mV,
0056 MAX8952_DVS_1110mV,
0057 MAX8952_DVS_1120mV,
0058 MAX8952_DVS_1130mV,
0059 MAX8952_DVS_1140mV,
0060 MAX8952_DVS_1150mV,
0061 MAX8952_DVS_1160mV,
0062 MAX8952_DVS_1170mV,
0063 MAX8952_DVS_1180mV,
0064 MAX8952_DVS_1190mV,
0065 MAX8952_DVS_1200mV,
0066 MAX8952_DVS_1210mV,
0067 MAX8952_DVS_1220mV,
0068 MAX8952_DVS_1230mV,
0069 MAX8952_DVS_1240mV,
0070 MAX8952_DVS_1250mV,
0071 MAX8952_DVS_1260mV,
0072 MAX8952_DVS_1270mV,
0073 MAX8952_DVS_1280mV,
0074 MAX8952_DVS_1290mV,
0075 MAX8952_DVS_1300mV,
0076 MAX8952_DVS_1310mV,
0077 MAX8952_DVS_1320mV,
0078 MAX8952_DVS_1330mV,
0079 MAX8952_DVS_1340mV,
0080 MAX8952_DVS_1350mV,
0081 MAX8952_DVS_1360mV,
0082 MAX8952_DVS_1370mV,
0083 MAX8952_DVS_1380mV,
0084 MAX8952_DVS_1390mV,
0085 MAX8952_DVS_1400mV,
0086 };
0087
0088 enum {
0089 MAX8952_SYNC_FREQ_26MHZ,
0090 MAX8952_SYNC_FREQ_13MHZ,
0091 MAX8952_SYNC_FREQ_19_2MHZ,
0092 };
0093
0094 enum {
0095 MAX8952_RAMP_32mV_us = 0,
0096 MAX8952_RAMP_16mV_us,
0097 MAX8952_RAMP_8mV_us,
0098 MAX8952_RAMP_4mV_us,
0099 MAX8952_RAMP_2mV_us,
0100 MAX8952_RAMP_1mV_us,
0101 MAX8952_RAMP_0_5mV_us,
0102 MAX8952_RAMP_0_25mV_us,
0103 };
0104
0105 #define MAX8952_NUM_DVS_MODE 4
0106
0107 struct max8952_platform_data {
0108 u32 default_mode;
0109 u32 dvs_mode[MAX8952_NUM_DVS_MODE];
0110
0111 u32 sync_freq;
0112 u32 ramp_speed;
0113
0114 struct regulator_init_data *reg_data;
0115 };
0116
0117
0118 #endif