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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 
0003 #ifndef __TI_SYSC_DATA_H__
0004 #define __TI_SYSC_DATA_H__
0005 
0006 enum ti_sysc_module_type {
0007     TI_SYSC_OMAP2,
0008     TI_SYSC_OMAP2_TIMER,
0009     TI_SYSC_OMAP3_SHAM,
0010     TI_SYSC_OMAP3_AES,
0011     TI_SYSC_OMAP4,
0012     TI_SYSC_OMAP4_TIMER,
0013     TI_SYSC_OMAP4_SIMPLE,
0014     TI_SYSC_OMAP34XX_SR,
0015     TI_SYSC_OMAP36XX_SR,
0016     TI_SYSC_OMAP4_SR,
0017     TI_SYSC_OMAP4_MCASP,
0018     TI_SYSC_OMAP4_USB_HOST_FS,
0019     TI_SYSC_DRA7_MCAN,
0020     TI_SYSC_PRUSS,
0021 };
0022 
0023 struct ti_sysc_cookie {
0024     void *data;
0025     void *clkdm;
0026 };
0027 
0028 /**
0029  * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
0030  * @midle_shift: Offset of the midle bit
0031  * @clkact_shift: Offset of the clockactivity bit
0032  * @sidle_shift: Offset of the sidle bit
0033  * @enwkup_shift: Offset of the enawakeup bit
0034  * @srst_shift: Offset of the softreset bit
0035  * @autoidle_shift: Offset of the autoidle bit
0036  * @dmadisable_shift: Offset of the dmadisable bit
0037  * @emufree_shift; Offset of the emufree bit
0038  *
0039  * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
0040  * feature is not available.
0041  */
0042 struct sysc_regbits {
0043     s8 midle_shift;
0044     s8 clkact_shift;
0045     s8 sidle_shift;
0046     s8 enwkup_shift;
0047     s8 srst_shift;
0048     s8 autoidle_shift;
0049     s8 dmadisable_shift;
0050     s8 emufree_shift;
0051 };
0052 
0053 #define SYSC_MODULE_QUIRK_OTG       BIT(30)
0054 #define SYSC_QUIRK_RESET_ON_CTX_LOST    BIT(29)
0055 #define SYSC_QUIRK_REINIT_ON_CTX_LOST   BIT(28)
0056 #define SYSC_QUIRK_REINIT_ON_RESUME BIT(27)
0057 #define SYSC_QUIRK_GPMC_DEBUG       BIT(26)
0058 #define SYSC_MODULE_QUIRK_ENA_RESETDONE BIT(25)
0059 #define SYSC_MODULE_QUIRK_PRUSS     BIT(24)
0060 #define SYSC_MODULE_QUIRK_DSS_RESET BIT(23)
0061 #define SYSC_MODULE_QUIRK_RTC_UNLOCK    BIT(22)
0062 #define SYSC_QUIRK_CLKDM_NOAUTO     BIT(21)
0063 #define SYSC_QUIRK_FORCE_MSTANDBY   BIT(20)
0064 #define SYSC_MODULE_QUIRK_AESS      BIT(19)
0065 #define SYSC_MODULE_QUIRK_SGX       BIT(18)
0066 #define SYSC_MODULE_QUIRK_HDQ1W     BIT(17)
0067 #define SYSC_MODULE_QUIRK_I2C       BIT(16)
0068 #define SYSC_MODULE_QUIRK_WDT       BIT(15)
0069 #define SYSS_QUIRK_RESETDONE_INVERTED   BIT(14)
0070 #define SYSC_QUIRK_SWSUP_MSTANDBY   BIT(13)
0071 #define SYSC_QUIRK_SWSUP_SIDLE_ACT  BIT(12)
0072 #define SYSC_QUIRK_SWSUP_SIDLE      BIT(11)
0073 #define SYSC_QUIRK_EXT_OPT_CLOCK    BIT(10)
0074 #define SYSC_QUIRK_LEGACY_IDLE      BIT(9)
0075 #define SYSC_QUIRK_RESET_STATUS     BIT(8)
0076 #define SYSC_QUIRK_NO_IDLE      BIT(7)
0077 #define SYSC_QUIRK_NO_IDLE_ON_INIT  BIT(6)
0078 #define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5)
0079 #define SYSC_QUIRK_OPT_CLKS_NEEDED  BIT(4)
0080 #define SYSC_QUIRK_OPT_CLKS_IN_RESET    BIT(3)
0081 #define SYSC_QUIRK_16BIT        BIT(2)
0082 #define SYSC_QUIRK_UNCACHED     BIT(1)
0083 #define SYSC_QUIRK_USE_CLOCKACT     BIT(0)
0084 
0085 #define SYSC_NR_IDLEMODES       4
0086 
0087 /**
0088  * struct sysc_capabilities - capabilities for an interconnect target module
0089  * @type: sysc type identifier for the module
0090  * @sysc_mask: bitmask of supported SYSCONFIG register bits
0091  * @regbits: bitmask of SYSCONFIG register bits
0092  * @mod_quirks: bitmask of module specific quirks
0093  */
0094 struct sysc_capabilities {
0095     const enum ti_sysc_module_type type;
0096     const u32 sysc_mask;
0097     const struct sysc_regbits *regbits;
0098     const u32 mod_quirks;
0099 };
0100 
0101 /**
0102  * struct sysc_config - configuration for an interconnect target module
0103  * @sysc_val: configured value for sysc register
0104  * @syss_mask: configured mask value for SYSSTATUS register
0105  * @midlemodes: bitmask of supported master idle modes
0106  * @sidlemodes: bitmask of supported slave idle modes
0107  * @srst_udelay: optional delay needed after OCP soft reset
0108  * @quirks: bitmask of enabled quirks
0109  */
0110 struct sysc_config {
0111     u32 sysc_val;
0112     u32 syss_mask;
0113     u8 midlemodes;
0114     u8 sidlemodes;
0115     u8 srst_udelay;
0116     u32 quirks;
0117 };
0118 
0119 enum sysc_registers {
0120     SYSC_REVISION,
0121     SYSC_SYSCONFIG,
0122     SYSC_SYSSTATUS,
0123     SYSC_MAX_REGS,
0124 };
0125 
0126 /**
0127  * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module
0128  * @name: legacy "ti,hwmods" module name
0129  * @module_pa: physical address of the interconnect target module
0130  * @module_size: size of the interconnect target module
0131  * @offsets: array of register offsets as listed in enum sysc_registers
0132  * @nr_offsets: number of registers
0133  * @cap: interconnect target module capabilities
0134  * @cfg: interconnect target module configuration
0135  *
0136  * This data is enough to allocate a new struct omap_hwmod_class_sysconfig
0137  * based on device tree data parsed by ti-sysc driver.
0138  */
0139 struct ti_sysc_module_data {
0140     const char *name;
0141     u64 module_pa;
0142     u32 module_size;
0143     int *offsets;
0144     int nr_offsets;
0145     const struct sysc_capabilities *cap;
0146     struct sysc_config *cfg;
0147 };
0148 
0149 struct device;
0150 struct clk;
0151 
0152 struct ti_sysc_platform_data {
0153     struct of_dev_auxdata *auxdata;
0154     bool (*soc_type_gp)(void);
0155     int (*init_clockdomain)(struct device *dev, struct clk *fck,
0156                 struct clk *ick, struct ti_sysc_cookie *cookie);
0157     void (*clkdm_deny_idle)(struct device *dev,
0158                 const struct ti_sysc_cookie *cookie);
0159     void (*clkdm_allow_idle)(struct device *dev,
0160                  const struct ti_sysc_cookie *cookie);
0161     int (*init_module)(struct device *dev,
0162                const struct ti_sysc_module_data *data,
0163                struct ti_sysc_cookie *cookie);
0164     int (*enable_module)(struct device *dev,
0165                  const struct ti_sysc_cookie *cookie);
0166     int (*idle_module)(struct device *dev,
0167                const struct ti_sysc_cookie *cookie);
0168     int (*shutdown_module)(struct device *dev,
0169                    const struct ti_sysc_cookie *cookie);
0170 };
0171 
0172 #endif  /* __TI_SYSC_DATA_H__ */