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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright 2009 Texas Instruments.
0004  */
0005 
0006 #ifndef __ARCH_ARM_DAVINCI_SPI_H
0007 #define __ARCH_ARM_DAVINCI_SPI_H
0008 
0009 #include <linux/platform_data/edma.h>
0010 
0011 #define SPI_INTERN_CS   0xFF
0012 
0013 enum {
0014     SPI_VERSION_1, /* For DM355/DM365/DM6467 */
0015     SPI_VERSION_2, /* For DA8xx */
0016 };
0017 
0018 /**
0019  * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
0020  *
0021  * @version:    version of the SPI IP. Different DaVinci devices have slightly
0022  *      varying versions of the same IP.
0023  * @num_chipselect: number of chipselects supported by this SPI master
0024  * @intr_line:  interrupt line used to connect the SPI IP to the ARM interrupt
0025  *      controller withn the SoC. Possible values are 0 and 1.
0026  * @cshold_bug: set this to true if the SPI controller on your chip requires
0027  *      a write to CSHOLD bit in between transfers (like in DM355).
0028  * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
0029  *      device on the bus.
0030  */
0031 struct davinci_spi_platform_data {
0032     u8          version;
0033     u8          num_chipselect;
0034     u8          intr_line;
0035     u8          prescaler_limit;
0036     bool            cshold_bug;
0037     enum dma_event_q    dma_event_q;
0038 };
0039 
0040 /**
0041  * davinci_spi_config - Per-chip-select configuration for SPI slave devices
0042  *
0043  * @wdelay: amount of delay between transmissions. Measured in number of
0044  *      SPI module clocks.
0045  * @odd_parity: polarity of parity flag at the end of transmit data stream.
0046  *      0 - odd parity, 1 - even parity.
0047  * @parity_enable: enable transmission of parity at end of each transmit
0048  *      data stream.
0049  * @io_type:    type of IO transfer. Choose between polled, interrupt and DMA.
0050  * @timer_disable: disable chip-select timers (setup and hold)
0051  * @c2tdelay:   chip-select setup time. Measured in number of SPI module clocks.
0052  * @t2cdelay:   chip-select hold time. Measured in number of SPI module clocks.
0053  * @t2edelay:   transmit data finished to SPI ENAn pin inactive time. Measured
0054  *      in number of SPI clocks.
0055  * @c2edelay:   chip-select active to SPI ENAn signal active time. Measured in
0056  *      number of SPI clocks.
0057  */
0058 struct davinci_spi_config {
0059     u8  wdelay;
0060     u8  odd_parity;
0061     u8  parity_enable;
0062 #define SPI_IO_TYPE_INTR    0
0063 #define SPI_IO_TYPE_POLL    1
0064 #define SPI_IO_TYPE_DMA     2
0065     u8  io_type;
0066     u8  timer_disable;
0067     u8  c2tdelay;
0068     u8  t2cdelay;
0069     u8  t2edelay;
0070     u8  c2edelay;
0071 };
0072 
0073 #endif  /* __ARCH_ARM_DAVINCI_SPI_H */