linux/platform_data/shmob_drm.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * shmob_drm.h  --  SH Mobile DRM driver
0004  *
0005  * Copyright (C) 2012 Renesas Corporation
0006  *
0007  * Laurent Pinchart (laurent.pinchart@ideasonboard.com)
0008  */
0009
0010 #ifndef __SHMOB_DRM_H__
0011 #define __SHMOB_DRM_H__
0012
0013 #include <drm/drm_mode.h>
0014
0015 enum shmob_drm_clk_source {
0016     SHMOB_DRM_CLK_BUS,
0017     SHMOB_DRM_CLK_PERIPHERAL,
0018     SHMOB_DRM_CLK_EXTERNAL,
0019 };
0020
0021 enum shmob_drm_interface {
0022     SHMOB_DRM_IFACE_RGB8,       /* 24bpp, 8:8:8 */
0023     SHMOB_DRM_IFACE_RGB9,       /* 18bpp, 9:9 */
0024     SHMOB_DRM_IFACE_RGB12A,     /* 24bpp, 12:12 */
0025     SHMOB_DRM_IFACE_RGB12B,     /* 12bpp */
0026     SHMOB_DRM_IFACE_RGB16,      /* 16bpp */
0027     SHMOB_DRM_IFACE_RGB18,      /* 18bpp */
0028     SHMOB_DRM_IFACE_RGB24,      /* 24bpp */
0029     SHMOB_DRM_IFACE_YUV422,     /* 16bpp */
0030     SHMOB_DRM_IFACE_SYS8A,      /* 24bpp, 8:8:8 */
0031     SHMOB_DRM_IFACE_SYS8B,      /* 18bpp, 8:8:2 */
0032     SHMOB_DRM_IFACE_SYS8C,      /* 18bpp, 2:8:8 */
0033     SHMOB_DRM_IFACE_SYS8D,      /* 16bpp, 8:8 */
0034     SHMOB_DRM_IFACE_SYS9,       /* 18bpp, 9:9 */
0035     SHMOB_DRM_IFACE_SYS12,      /* 24bpp, 12:12 */
0036     SHMOB_DRM_IFACE_SYS16A,     /* 16bpp */
0037     SHMOB_DRM_IFACE_SYS16B,     /* 18bpp, 16:2 */
0038     SHMOB_DRM_IFACE_SYS16C,     /* 18bpp, 2:16 */
0039     SHMOB_DRM_IFACE_SYS18,      /* 18bpp */
0040     SHMOB_DRM_IFACE_SYS24,      /* 24bpp */
0041 };
0042
0043 struct shmob_drm_backlight_data {
0044     const char *name;
0045     int max_brightness;
0046     int (*get_brightness)(void);
0047     int (*set_brightness)(int brightness);
0048 };
0049
0050 struct shmob_drm_panel_data {
0051     unsigned int width_mm;      /* Panel width in mm */
0052     unsigned int height_mm;     /* Panel height in mm */
0053     struct drm_mode_modeinfo mode;
0054 };
0055
0056 struct shmob_drm_sys_interface_data {
0057     unsigned int read_latch:6;
0058     unsigned int read_setup:8;
0059     unsigned int read_cycle:8;
0060     unsigned int read_strobe:8;
0061     unsigned int write_setup:8;
0062     unsigned int write_cycle:8;
0063     unsigned int write_strobe:8;
0064     unsigned int cs_setup:3;
0065     unsigned int vsync_active_high:1;
0066     unsigned int vsync_dir_input:1;
0067 };
0068
0069 #define SHMOB_DRM_IFACE_FL_DWPOL (1 << 0) /* Rising edge dot clock data latch */
0070 #define SHMOB_DRM_IFACE_FL_DIPOL (1 << 1) /* Active low display enable */
0071 #define SHMOB_DRM_IFACE_FL_DAPOL (1 << 2) /* Active low display data */
0072 #define SHMOB_DRM_IFACE_FL_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */
0073 #define SHMOB_DRM_IFACE_FL_DWCNT (1 << 4) /* Disable dotclock during blanking */
0074
0075 struct shmob_drm_interface_data {
0076     enum shmob_drm_interface interface;
0077     struct shmob_drm_sys_interface_data sys;
0078     unsigned int clk_div;
0079     unsigned int flags;
0080 };
0081
0082 struct shmob_drm_platform_data {
0083     enum shmob_drm_clk_source clk_source;
0084     struct shmob_drm_interface_data iface;
0085     struct shmob_drm_panel_data panel;
0086     struct shmob_drm_backlight_data backlight;
0087 };
0088
0089 #endif /* __SHMOB_DRM_H__ */