linux/platform_data/pxa_sdhci.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * include/linux/platform_data/pxa_sdhci.h
0004  *
0005  * Copyright 2010 Marvell
0006  *  Zhangfei Gao <zhangfei.gao@marvell.com>
0007  *
0008  * PXA Platform - SDHCI platform data definitions
0009  */
0010
0011 #ifndef _PXA_SDHCI_H_
0012 #define _PXA_SDHCI_H_
0013
0014 /* pxa specific flag */
0015 /* Require clock free running */
0016 #define PXA_FLAG_ENABLE_CLOCK_GATING (1<<0)
0017 /* card always wired to host, like on-chip emmc */
0018 #define PXA_FLAG_CARD_PERMANENT (1<<1)
0019 /* Board design supports 8-bit data on SD/SDIO BUS */
0020 #define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2)
0021
0022 /*
0023  * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
0024  * @flags: flags for platform requirement
0025  * @clk_delay_cycles:
0026  *  mmp2: each step is roughly 100ps, 5bits width
0027  *  pxa910: each step is 1ns, 4bits width
0028  * @clk_delay_sel: select clk_delay, used on pxa910
0029  *  0: choose feedback clk
0030  *  1: choose feedback clk + delay value
0031  *  2: choose internal clk
0032  * @clk_delay_enable: enable clk_delay or not, used on pxa910
0033  * @max_speed: the maximum speed supported
0034  * @host_caps: Standard MMC host capabilities bit field.
0035  * @quirks: quirks of platfrom
0036  * @quirks2: quirks2 of platfrom
0037  * @pm_caps: pm_caps of platfrom
0038  */
0039 struct sdhci_pxa_platdata {
0040     unsigned int    flags;
0041     unsigned int    clk_delay_cycles;
0042     unsigned int    clk_delay_sel;
0043     bool        clk_delay_enable;
0044     unsigned int    max_speed;
0045     u32     host_caps;
0046     u32     host_caps2;
0047     unsigned int    quirks;
0048     unsigned int    quirks2;
0049     unsigned int    pm_caps;
0050 };
0051 #endif /* _PXA_SDHCI_H_ */