platform_data/media/omap4iss.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef ARCH_ARM_PLAT_OMAP4_ISS_H
0003 #define ARCH_ARM_PLAT_OMAP4_ISS_H
0004
0005 #include <linux/i2c.h>
0006
0007 struct iss_device;
0008
0009 enum iss_interface_type {
0010     ISS_INTERFACE_CSI2A_PHY1,
0011     ISS_INTERFACE_CSI2B_PHY2,
0012 };
0013
0014 /**
0015  * struct iss_csiphy_lane: CSI2 lane position and polarity
0016  * @pos: position of the lane
0017  * @pol: polarity of the lane
0018  */
0019 struct iss_csiphy_lane {
0020     u8 pos;
0021     u8 pol;
0022 };
0023
0024 #define ISS_CSIPHY1_NUM_DATA_LANES  4
0025 #define ISS_CSIPHY2_NUM_DATA_LANES  1
0026
0027 /**
0028  * struct iss_csiphy_lanes_cfg - CSI2 lane configuration
0029  * @data: Configuration of one or two data lanes
0030  * @clk: Clock lane configuration
0031  */
0032 struct iss_csiphy_lanes_cfg {
0033     struct iss_csiphy_lane data[ISS_CSIPHY1_NUM_DATA_LANES];
0034     struct iss_csiphy_lane clk;
0035 };
0036
0037 /**
0038  * struct iss_csi2_platform_data - CSI2 interface platform data
0039  * @crc: Enable the cyclic redundancy check
0040  * @vpclk_div: Video port output clock control
0041  */
0042 struct iss_csi2_platform_data {
0043     unsigned crc:1;
0044     unsigned vpclk_div:2;
0045     struct iss_csiphy_lanes_cfg lanecfg;
0046 };
0047
0048 struct iss_subdev_i2c_board_info {
0049     struct i2c_board_info *board_info;
0050     int i2c_adapter_id;
0051 };
0052
0053 struct iss_v4l2_subdevs_group {
0054     struct iss_subdev_i2c_board_info *subdevs;
0055     enum iss_interface_type interface;
0056     union {
0057         struct iss_csi2_platform_data csi2;
0058     } bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
0059 };
0060
0061 struct iss_platform_data {
0062     struct iss_v4l2_subdevs_group *subdevs;
0063     void (*set_constraints)(struct iss_device *iss, bool enable);
0064 };
0065
0066 #endif