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0008 #ifndef _LP855X_H
0009 #define _LP855X_H
0010
0011 #define BL_CTL_SHFT (0)
0012 #define BRT_MODE_SHFT (1)
0013 #define BRT_MODE_MASK (0x06)
0014
0015
0016 #define ENABLE_BL (1)
0017 #define DISABLE_BL (0)
0018
0019 #define I2C_CONFIG(id) id ## _I2C_CONFIG
0020 #define PWM_CONFIG(id) id ## _PWM_CONFIG
0021
0022
0023 #define LP8550_PWM_CONFIG (LP8550_PWM_ONLY << BRT_MODE_SHFT)
0024 #define LP8550_I2C_CONFIG ((ENABLE_BL << BL_CTL_SHFT) | \
0025 (LP8550_I2C_ONLY << BRT_MODE_SHFT))
0026
0027
0028 #define LP8551_PWM_CONFIG LP8550_PWM_CONFIG
0029 #define LP8551_I2C_CONFIG LP8550_I2C_CONFIG
0030
0031
0032 #define LP8552_PWM_CONFIG LP8550_PWM_CONFIG
0033 #define LP8552_I2C_CONFIG LP8550_I2C_CONFIG
0034
0035
0036 #define LP8553_PWM_CONFIG LP8550_PWM_CONFIG
0037 #define LP8553_I2C_CONFIG LP8550_I2C_CONFIG
0038
0039
0040 #define LP8555_PWM_STANDBY BIT(7)
0041 #define LP8555_PWM_FILTER BIT(6)
0042 #define LP8555_RELOAD_EPROM BIT(3)
0043
0044 #define LP8555_OFF_OPENLEDS BIT(2)
0045 #define LP8555_PWM_CONFIG LP8555_PWM_ONLY
0046 #define LP8555_I2C_CONFIG LP8555_I2C_ONLY
0047 #define LP8555_COMB1_CONFIG LP8555_COMBINED1
0048 #define LP8555_COMB2_CONFIG LP8555_COMBINED2
0049
0050
0051 #define LP8556_PWM_CONFIG (LP8556_PWM_ONLY << BRT_MODE_SHFT)
0052 #define LP8556_COMB1_CONFIG (LP8556_COMBINED1 << BRT_MODE_SHFT)
0053 #define LP8556_I2C_CONFIG ((ENABLE_BL << BL_CTL_SHFT) | \
0054 (LP8556_I2C_ONLY << BRT_MODE_SHFT))
0055 #define LP8556_COMB2_CONFIG (LP8556_COMBINED2 << BRT_MODE_SHFT)
0056 #define LP8556_FAST_CONFIG BIT(7)
0057
0058
0059
0060 #define LP8557_PWM_STANDBY BIT(7)
0061 #define LP8557_PWM_FILTER BIT(6)
0062 #define LP8557_RELOAD_EPROM BIT(3)
0063
0064 #define LP8557_OFF_OPENLEDS BIT(2)
0065 #define LP8557_PWM_CONFIG LP8557_PWM_ONLY
0066 #define LP8557_I2C_CONFIG LP8557_I2C_ONLY
0067 #define LP8557_COMB1_CONFIG LP8557_COMBINED1
0068 #define LP8557_COMB2_CONFIG LP8557_COMBINED2
0069
0070 enum lp855x_chip_id {
0071 LP8550,
0072 LP8551,
0073 LP8552,
0074 LP8553,
0075 LP8555,
0076 LP8556,
0077 LP8557,
0078 };
0079
0080 enum lp8550_brighntess_source {
0081 LP8550_PWM_ONLY,
0082 LP8550_I2C_ONLY = 2,
0083 };
0084
0085 enum lp8551_brighntess_source {
0086 LP8551_PWM_ONLY = LP8550_PWM_ONLY,
0087 LP8551_I2C_ONLY = LP8550_I2C_ONLY,
0088 };
0089
0090 enum lp8552_brighntess_source {
0091 LP8552_PWM_ONLY = LP8550_PWM_ONLY,
0092 LP8552_I2C_ONLY = LP8550_I2C_ONLY,
0093 };
0094
0095 enum lp8553_brighntess_source {
0096 LP8553_PWM_ONLY = LP8550_PWM_ONLY,
0097 LP8553_I2C_ONLY = LP8550_I2C_ONLY,
0098 };
0099
0100 enum lp8555_brightness_source {
0101 LP8555_PWM_ONLY,
0102 LP8555_I2C_ONLY,
0103 LP8555_COMBINED1,
0104 LP8555_COMBINED2,
0105 };
0106
0107 enum lp8556_brightness_source {
0108 LP8556_PWM_ONLY,
0109 LP8556_COMBINED1,
0110 LP8556_I2C_ONLY,
0111 LP8556_COMBINED2,
0112 };
0113
0114 enum lp8557_brightness_source {
0115 LP8557_PWM_ONLY,
0116 LP8557_I2C_ONLY,
0117 LP8557_COMBINED1,
0118 LP8557_COMBINED2,
0119 };
0120
0121 struct lp855x_rom_data {
0122 u8 addr;
0123 u8 val;
0124 };
0125
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0134
0135
0136 struct lp855x_platform_data {
0137 const char *name;
0138 u8 device_control;
0139 u8 initial_brightness;
0140 unsigned int period_ns;
0141 int size_program;
0142 struct lp855x_rom_data *rom_data;
0143 };
0144
0145 #endif