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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Framework and drivers for configuring and reading different PHYs
0004  * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
0005  *
0006  * Author: Andy Fleming
0007  *
0008  * Copyright (c) 2004 Freescale Semiconductor, Inc.
0009  */
0010 
0011 #ifndef __PHY_H
0012 #define __PHY_H
0013 
0014 #include <linux/compiler.h>
0015 #include <linux/spinlock.h>
0016 #include <linux/ethtool.h>
0017 #include <linux/linkmode.h>
0018 #include <linux/netlink.h>
0019 #include <linux/mdio.h>
0020 #include <linux/mii.h>
0021 #include <linux/mii_timestamper.h>
0022 #include <linux/module.h>
0023 #include <linux/timer.h>
0024 #include <linux/workqueue.h>
0025 #include <linux/mod_devicetable.h>
0026 #include <linux/u64_stats_sync.h>
0027 #include <linux/irqreturn.h>
0028 #include <linux/iopoll.h>
0029 #include <linux/refcount.h>
0030 
0031 #include <linux/atomic.h>
0032 
0033 #define PHY_DEFAULT_FEATURES    (SUPPORTED_Autoneg | \
0034                  SUPPORTED_TP | \
0035                  SUPPORTED_MII)
0036 
0037 #define PHY_10BT_FEATURES   (SUPPORTED_10baseT_Half | \
0038                  SUPPORTED_10baseT_Full)
0039 
0040 #define PHY_100BT_FEATURES  (SUPPORTED_100baseT_Half | \
0041                  SUPPORTED_100baseT_Full)
0042 
0043 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
0044                  SUPPORTED_1000baseT_Full)
0045 
0046 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
0047 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
0048 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
0049 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
0050 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
0051 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
0052 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
0053 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
0054 
0055 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
0056 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
0057 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
0058 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
0059 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
0060 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
0061 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
0062 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
0063 
0064 extern const int phy_basic_ports_array[3];
0065 extern const int phy_fibre_port_array[1];
0066 extern const int phy_all_ports_features_array[7];
0067 extern const int phy_10_100_features_array[4];
0068 extern const int phy_basic_t1_features_array[3];
0069 extern const int phy_gbit_features_array[2];
0070 extern const int phy_10gbit_features_array[1];
0071 
0072 /*
0073  * Set phydev->irq to PHY_POLL if interrupts are not supported,
0074  * or not desired for this PHY.  Set to PHY_MAC_INTERRUPT if
0075  * the attached MAC driver handles the interrupt
0076  */
0077 #define PHY_POLL        -1
0078 #define PHY_MAC_INTERRUPT   -2
0079 
0080 #define PHY_IS_INTERNAL     0x00000001
0081 #define PHY_RST_AFTER_CLK_EN    0x00000002
0082 #define PHY_POLL_CABLE_TEST 0x00000004
0083 #define MDIO_DEVICE_IS_PHY  0x80000000
0084 
0085 /**
0086  * enum phy_interface_t - Interface Mode definitions
0087  *
0088  * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
0089  * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
0090  * @PHY_INTERFACE_MODE_MII: Media-independent interface
0091  * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
0092  * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
0093  * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
0094  * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
0095  * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
0096  * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
0097  * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
0098  * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
0099  * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
0100  * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
0101  * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
0102  * @PHY_INTERFACE_MODE_SMII: Serial MII
0103  * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
0104  * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
0105  * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
0106  * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
0107  * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
0108  * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
0109  * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
0110  * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
0111  * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
0112  * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
0113  * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
0114  * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
0115  * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
0116  * @PHY_INTERFACE_MODE_USXGMII:  Universal Serial 10GE MII
0117  * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
0118  * @PHY_INTERFACE_MODE_MAX: Book keeping
0119  *
0120  * Describes the interface between the MAC and PHY.
0121  */
0122 typedef enum {
0123     PHY_INTERFACE_MODE_NA,
0124     PHY_INTERFACE_MODE_INTERNAL,
0125     PHY_INTERFACE_MODE_MII,
0126     PHY_INTERFACE_MODE_GMII,
0127     PHY_INTERFACE_MODE_SGMII,
0128     PHY_INTERFACE_MODE_TBI,
0129     PHY_INTERFACE_MODE_REVMII,
0130     PHY_INTERFACE_MODE_RMII,
0131     PHY_INTERFACE_MODE_REVRMII,
0132     PHY_INTERFACE_MODE_RGMII,
0133     PHY_INTERFACE_MODE_RGMII_ID,
0134     PHY_INTERFACE_MODE_RGMII_RXID,
0135     PHY_INTERFACE_MODE_RGMII_TXID,
0136     PHY_INTERFACE_MODE_RTBI,
0137     PHY_INTERFACE_MODE_SMII,
0138     PHY_INTERFACE_MODE_XGMII,
0139     PHY_INTERFACE_MODE_XLGMII,
0140     PHY_INTERFACE_MODE_MOCA,
0141     PHY_INTERFACE_MODE_QSGMII,
0142     PHY_INTERFACE_MODE_TRGMII,
0143     PHY_INTERFACE_MODE_100BASEX,
0144     PHY_INTERFACE_MODE_1000BASEX,
0145     PHY_INTERFACE_MODE_2500BASEX,
0146     PHY_INTERFACE_MODE_5GBASER,
0147     PHY_INTERFACE_MODE_RXAUI,
0148     PHY_INTERFACE_MODE_XAUI,
0149     /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
0150     PHY_INTERFACE_MODE_10GBASER,
0151     PHY_INTERFACE_MODE_25GBASER,
0152     PHY_INTERFACE_MODE_USXGMII,
0153     /* 10GBASE-KR - with Clause 73 AN */
0154     PHY_INTERFACE_MODE_10GKR,
0155     PHY_INTERFACE_MODE_MAX,
0156 } phy_interface_t;
0157 
0158 /* PHY interface mode bitmap handling */
0159 #define DECLARE_PHY_INTERFACE_MASK(name) \
0160     DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
0161 
0162 static inline void phy_interface_zero(unsigned long *intf)
0163 {
0164     bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
0165 }
0166 
0167 static inline bool phy_interface_empty(const unsigned long *intf)
0168 {
0169     return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
0170 }
0171 
0172 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
0173                      const unsigned long *b)
0174 {
0175     bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
0176 }
0177 
0178 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
0179                     const unsigned long *b)
0180 {
0181     bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
0182 }
0183 
0184 static inline void phy_interface_set_rgmii(unsigned long *intf)
0185 {
0186     __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
0187     __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
0188     __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
0189     __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
0190 }
0191 
0192 /*
0193  * phy_supported_speeds - return all speeds currently supported by a PHY device
0194  */
0195 unsigned int phy_supported_speeds(struct phy_device *phy,
0196                       unsigned int *speeds,
0197                       unsigned int size);
0198 
0199 /**
0200  * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
0201  * @interface: enum phy_interface_t value
0202  *
0203  * Description: maps enum &phy_interface_t defined in this file
0204  * into the device tree binding of 'phy-mode', so that Ethernet
0205  * device driver can get PHY interface from device tree.
0206  */
0207 static inline const char *phy_modes(phy_interface_t interface)
0208 {
0209     switch (interface) {
0210     case PHY_INTERFACE_MODE_NA:
0211         return "";
0212     case PHY_INTERFACE_MODE_INTERNAL:
0213         return "internal";
0214     case PHY_INTERFACE_MODE_MII:
0215         return "mii";
0216     case PHY_INTERFACE_MODE_GMII:
0217         return "gmii";
0218     case PHY_INTERFACE_MODE_SGMII:
0219         return "sgmii";
0220     case PHY_INTERFACE_MODE_TBI:
0221         return "tbi";
0222     case PHY_INTERFACE_MODE_REVMII:
0223         return "rev-mii";
0224     case PHY_INTERFACE_MODE_RMII:
0225         return "rmii";
0226     case PHY_INTERFACE_MODE_REVRMII:
0227         return "rev-rmii";
0228     case PHY_INTERFACE_MODE_RGMII:
0229         return "rgmii";
0230     case PHY_INTERFACE_MODE_RGMII_ID:
0231         return "rgmii-id";
0232     case PHY_INTERFACE_MODE_RGMII_RXID:
0233         return "rgmii-rxid";
0234     case PHY_INTERFACE_MODE_RGMII_TXID:
0235         return "rgmii-txid";
0236     case PHY_INTERFACE_MODE_RTBI:
0237         return "rtbi";
0238     case PHY_INTERFACE_MODE_SMII:
0239         return "smii";
0240     case PHY_INTERFACE_MODE_XGMII:
0241         return "xgmii";
0242     case PHY_INTERFACE_MODE_XLGMII:
0243         return "xlgmii";
0244     case PHY_INTERFACE_MODE_MOCA:
0245         return "moca";
0246     case PHY_INTERFACE_MODE_QSGMII:
0247         return "qsgmii";
0248     case PHY_INTERFACE_MODE_TRGMII:
0249         return "trgmii";
0250     case PHY_INTERFACE_MODE_1000BASEX:
0251         return "1000base-x";
0252     case PHY_INTERFACE_MODE_2500BASEX:
0253         return "2500base-x";
0254     case PHY_INTERFACE_MODE_5GBASER:
0255         return "5gbase-r";
0256     case PHY_INTERFACE_MODE_RXAUI:
0257         return "rxaui";
0258     case PHY_INTERFACE_MODE_XAUI:
0259         return "xaui";
0260     case PHY_INTERFACE_MODE_10GBASER:
0261         return "10gbase-r";
0262     case PHY_INTERFACE_MODE_25GBASER:
0263         return "25gbase-r";
0264     case PHY_INTERFACE_MODE_USXGMII:
0265         return "usxgmii";
0266     case PHY_INTERFACE_MODE_10GKR:
0267         return "10gbase-kr";
0268     case PHY_INTERFACE_MODE_100BASEX:
0269         return "100base-x";
0270     default:
0271         return "unknown";
0272     }
0273 }
0274 
0275 
0276 #define PHY_INIT_TIMEOUT    100000
0277 #define PHY_FORCE_TIMEOUT   10
0278 
0279 #define PHY_MAX_ADDR    32
0280 
0281 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
0282 #define PHY_ID_FMT "%s:%02x"
0283 
0284 #define MII_BUS_ID_SIZE 61
0285 
0286 struct device;
0287 struct phylink;
0288 struct sfp_bus;
0289 struct sfp_upstream_ops;
0290 struct sk_buff;
0291 
0292 /**
0293  * struct mdio_bus_stats - Statistics counters for MDIO busses
0294  * @transfers: Total number of transfers, i.e. @writes + @reads
0295  * @errors: Number of MDIO transfers that returned an error
0296  * @writes: Number of write transfers
0297  * @reads: Number of read transfers
0298  * @syncp: Synchronisation for incrementing statistics
0299  */
0300 struct mdio_bus_stats {
0301     u64_stats_t transfers;
0302     u64_stats_t errors;
0303     u64_stats_t writes;
0304     u64_stats_t reads;
0305     /* Must be last, add new statistics above */
0306     struct u64_stats_sync syncp;
0307 };
0308 
0309 /**
0310  * struct phy_package_shared - Shared information in PHY packages
0311  * @addr: Common PHY address used to combine PHYs in one package
0312  * @refcnt: Number of PHYs connected to this shared data
0313  * @flags: Initialization of PHY package
0314  * @priv_size: Size of the shared private data @priv
0315  * @priv: Driver private data shared across a PHY package
0316  *
0317  * Represents a shared structure between different phydev's in the same
0318  * package, for example a quad PHY. See phy_package_join() and
0319  * phy_package_leave().
0320  */
0321 struct phy_package_shared {
0322     int addr;
0323     refcount_t refcnt;
0324     unsigned long flags;
0325     size_t priv_size;
0326 
0327     /* private data pointer */
0328     /* note that this pointer is shared between different phydevs and
0329      * the user has to take care of appropriate locking. It is allocated
0330      * and freed automatically by phy_package_join() and
0331      * phy_package_leave().
0332      */
0333     void *priv;
0334 };
0335 
0336 /* used as bit number in atomic bitops */
0337 #define PHY_SHARED_F_INIT_DONE  0
0338 #define PHY_SHARED_F_PROBE_DONE 1
0339 
0340 /**
0341  * struct mii_bus - Represents an MDIO bus
0342  *
0343  * @owner: Who owns this device
0344  * @name: User friendly name for this MDIO device, or driver name
0345  * @id: Unique identifier for this bus, typical from bus hierarchy
0346  * @priv: Driver private data
0347  *
0348  * The Bus class for PHYs.  Devices which provide access to
0349  * PHYs should register using this structure
0350  */
0351 struct mii_bus {
0352     struct module *owner;
0353     const char *name;
0354     char id[MII_BUS_ID_SIZE];
0355     void *priv;
0356     /** @read: Perform a read transfer on the bus */
0357     int (*read)(struct mii_bus *bus, int addr, int regnum);
0358     /** @write: Perform a write transfer on the bus */
0359     int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
0360     /** @reset: Perform a reset of the bus */
0361     int (*reset)(struct mii_bus *bus);
0362 
0363     /** @stats: Statistic counters per device on the bus */
0364     struct mdio_bus_stats stats[PHY_MAX_ADDR];
0365 
0366     /**
0367      * @mdio_lock: A lock to ensure that only one thing can read/write
0368      * the MDIO bus at a time
0369      */
0370     struct mutex mdio_lock;
0371 
0372     /** @parent: Parent device of this bus */
0373     struct device *parent;
0374     /** @state: State of bus structure */
0375     enum {
0376         MDIOBUS_ALLOCATED = 1,
0377         MDIOBUS_REGISTERED,
0378         MDIOBUS_UNREGISTERED,
0379         MDIOBUS_RELEASED,
0380     } state;
0381 
0382     /** @dev: Kernel device representation */
0383     struct device dev;
0384 
0385     /** @mdio_map: list of all MDIO devices on bus */
0386     struct mdio_device *mdio_map[PHY_MAX_ADDR];
0387 
0388     /** @phy_mask: PHY addresses to be ignored when probing */
0389     u32 phy_mask;
0390 
0391     /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
0392     u32 phy_ignore_ta_mask;
0393 
0394     /**
0395      * @irq: An array of interrupts, each PHY's interrupt at the index
0396      * matching its address
0397      */
0398     int irq[PHY_MAX_ADDR];
0399 
0400     /** @reset_delay_us: GPIO reset pulse width in microseconds */
0401     int reset_delay_us;
0402     /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
0403     int reset_post_delay_us;
0404     /** @reset_gpiod: Reset GPIO descriptor pointer */
0405     struct gpio_desc *reset_gpiod;
0406 
0407     /** @probe_capabilities: bus capabilities, used for probing */
0408     enum {
0409         MDIOBUS_NO_CAP = 0,
0410         MDIOBUS_C22,
0411         MDIOBUS_C45,
0412         MDIOBUS_C22_C45,
0413     } probe_capabilities;
0414 
0415     /** @shared_lock: protect access to the shared element */
0416     struct mutex shared_lock;
0417 
0418     /** @shared: shared state across different PHYs */
0419     struct phy_package_shared *shared[PHY_MAX_ADDR];
0420 };
0421 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
0422 
0423 struct mii_bus *mdiobus_alloc_size(size_t size);
0424 
0425 /**
0426  * mdiobus_alloc - Allocate an MDIO bus structure
0427  *
0428  * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
0429  * for the driver to register the bus.
0430  */
0431 static inline struct mii_bus *mdiobus_alloc(void)
0432 {
0433     return mdiobus_alloc_size(0);
0434 }
0435 
0436 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
0437 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
0438                 struct module *owner);
0439 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
0440 #define devm_mdiobus_register(dev, bus) \
0441         __devm_mdiobus_register(dev, bus, THIS_MODULE)
0442 
0443 void mdiobus_unregister(struct mii_bus *bus);
0444 void mdiobus_free(struct mii_bus *bus);
0445 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
0446 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
0447 {
0448     return devm_mdiobus_alloc_size(dev, 0);
0449 }
0450 
0451 struct mii_bus *mdio_find_bus(const char *mdio_name);
0452 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
0453 
0454 #define PHY_INTERRUPT_DISABLED  false
0455 #define PHY_INTERRUPT_ENABLED   true
0456 
0457 /**
0458  * enum phy_state - PHY state machine states:
0459  *
0460  * @PHY_DOWN: PHY device and driver are not ready for anything.  probe
0461  * should be called if and only if the PHY is in this state,
0462  * given that the PHY device exists.
0463  * - PHY driver probe function will set the state to @PHY_READY
0464  *
0465  * @PHY_READY: PHY is ready to send and receive packets, but the
0466  * controller is not.  By default, PHYs which do not implement
0467  * probe will be set to this state by phy_probe().
0468  * - start will set the state to UP
0469  *
0470  * @PHY_UP: The PHY and attached device are ready to do work.
0471  * Interrupts should be started here.
0472  * - timer moves to @PHY_NOLINK or @PHY_RUNNING
0473  *
0474  * @PHY_NOLINK: PHY is up, but not currently plugged in.
0475  * - irq or timer will set @PHY_RUNNING if link comes back
0476  * - phy_stop moves to @PHY_HALTED
0477  *
0478  * @PHY_RUNNING: PHY is currently up, running, and possibly sending
0479  * and/or receiving packets
0480  * - irq or timer will set @PHY_NOLINK if link goes down
0481  * - phy_stop moves to @PHY_HALTED
0482  *
0483  * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
0484  * is not expected to work, carrier will be indicated as down. PHY will be
0485  * poll once per second, or on interrupt for it current state.
0486  * Once complete, move to UP to restart the PHY.
0487  * - phy_stop aborts the running test and moves to @PHY_HALTED
0488  *
0489  * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
0490  * PHY is in an error state.
0491  * - phy_start moves to @PHY_UP
0492  */
0493 enum phy_state {
0494     PHY_DOWN = 0,
0495     PHY_READY,
0496     PHY_HALTED,
0497     PHY_UP,
0498     PHY_RUNNING,
0499     PHY_NOLINK,
0500     PHY_CABLETEST,
0501 };
0502 
0503 #define MDIO_MMD_NUM 32
0504 
0505 /**
0506  * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
0507  * @devices_in_package: IEEE 802.3 devices in package register value.
0508  * @mmds_present: bit vector of MMDs present.
0509  * @device_ids: The device identifer for each present device.
0510  */
0511 struct phy_c45_device_ids {
0512     u32 devices_in_package;
0513     u32 mmds_present;
0514     u32 device_ids[MDIO_MMD_NUM];
0515 };
0516 
0517 struct macsec_context;
0518 struct macsec_ops;
0519 
0520 /**
0521  * struct phy_device - An instance of a PHY
0522  *
0523  * @mdio: MDIO bus this PHY is on
0524  * @drv: Pointer to the driver for this PHY instance
0525  * @phy_id: UID for this device found during discovery
0526  * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
0527  * @is_c45:  Set to true if this PHY uses clause 45 addressing.
0528  * @is_internal: Set to true if this PHY is internal to a MAC.
0529  * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
0530  * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
0531  * @has_fixups: Set to true if this PHY has fixups/quirks.
0532  * @suspended: Set to true if this PHY has been suspended successfully.
0533  * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
0534  * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
0535  * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
0536  * @downshifted_rate: Set true if link speed has been downshifted.
0537  * @is_on_sfp_module: Set true if PHY is located on an SFP module.
0538  * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
0539  * @state: State of the PHY for management purposes
0540  * @dev_flags: Device-specific flags used by the PHY driver.
0541  *
0542  *      - Bits [15:0] are free to use by the PHY driver to communicate
0543  *        driver specific behavior.
0544  *      - Bits [23:16] are currently reserved for future use.
0545  *      - Bits [31:24] are reserved for defining generic
0546  *        PHY driver behavior.
0547  * @irq: IRQ number of the PHY's interrupt (-1 if none)
0548  * @phy_timer: The timer for handling the state machine
0549  * @phylink: Pointer to phylink instance for this PHY
0550  * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
0551  * @sfp_bus: SFP bus attached to this PHY's fiber port
0552  * @attached_dev: The attached enet driver's device instance ptr
0553  * @adjust_link: Callback for the enet controller to respond to changes: in the
0554  *               link state.
0555  * @phy_link_change: Callback for phylink for notification of link change
0556  * @macsec_ops: MACsec offloading ops.
0557  *
0558  * @speed: Current link speed
0559  * @duplex: Current duplex
0560  * @port: Current port
0561  * @pause: Current pause
0562  * @asym_pause: Current asymmetric pause
0563  * @supported: Combined MAC/PHY supported linkmodes
0564  * @advertising: Currently advertised linkmodes
0565  * @adv_old: Saved advertised while power saving for WoL
0566  * @lp_advertising: Current link partner advertised linkmodes
0567  * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
0568  * @autoneg: Flag autoneg being used
0569  * @link: Current link state
0570  * @autoneg_complete: Flag auto negotiation of the link has completed
0571  * @mdix: Current crossover
0572  * @mdix_ctrl: User setting of crossover
0573  * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
0574  * @interrupts: Flag interrupts have been enabled
0575  * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
0576  *                 handling shall be postponed until PHY has resumed
0577  * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
0578  *             requiring a rerun of the interrupt handler after resume
0579  * @interface: enum phy_interface_t value
0580  * @skb: Netlink message for cable diagnostics
0581  * @nest: Netlink nest used for cable diagnostics
0582  * @ehdr: nNtlink header for cable diagnostics
0583  * @phy_led_triggers: Array of LED triggers
0584  * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
0585  * @led_link_trigger: LED trigger for link up/down
0586  * @last_triggered: last LED trigger for link speed
0587  * @master_slave_set: User requested master/slave configuration
0588  * @master_slave_get: Current master/slave advertisement
0589  * @master_slave_state: Current master/slave configuration
0590  * @mii_ts: Pointer to time stamper callbacks
0591  * @lock:  Mutex for serialization access to PHY
0592  * @state_queue: Work queue for state machine
0593  * @shared: Pointer to private data shared by phys in one package
0594  * @priv: Pointer to driver private data
0595  *
0596  * interrupts currently only supports enabled or disabled,
0597  * but could be changed in the future to support enabling
0598  * and disabling specific interrupts
0599  *
0600  * Contains some infrastructure for polling and interrupt
0601  * handling, as well as handling shifts in PHY hardware state
0602  */
0603 struct phy_device {
0604     struct mdio_device mdio;
0605 
0606     /* Information about the PHY type */
0607     /* And management functions */
0608     struct phy_driver *drv;
0609 
0610     u32 phy_id;
0611 
0612     struct phy_c45_device_ids c45_ids;
0613     unsigned is_c45:1;
0614     unsigned is_internal:1;
0615     unsigned is_pseudo_fixed_link:1;
0616     unsigned is_gigabit_capable:1;
0617     unsigned has_fixups:1;
0618     unsigned suspended:1;
0619     unsigned suspended_by_mdio_bus:1;
0620     unsigned sysfs_links:1;
0621     unsigned loopback_enabled:1;
0622     unsigned downshifted_rate:1;
0623     unsigned is_on_sfp_module:1;
0624     unsigned mac_managed_pm:1;
0625 
0626     unsigned autoneg:1;
0627     /* The most recently read link state */
0628     unsigned link:1;
0629     unsigned autoneg_complete:1;
0630 
0631     /* Interrupts are enabled */
0632     unsigned interrupts:1;
0633     unsigned irq_suspended:1;
0634     unsigned irq_rerun:1;
0635 
0636     enum phy_state state;
0637 
0638     u32 dev_flags;
0639 
0640     phy_interface_t interface;
0641 
0642     /*
0643      * forced speed & duplex (no autoneg)
0644      * partner speed & duplex & pause (autoneg)
0645      */
0646     int speed;
0647     int duplex;
0648     int port;
0649     int pause;
0650     int asym_pause;
0651     u8 master_slave_get;
0652     u8 master_slave_set;
0653     u8 master_slave_state;
0654 
0655     /* Union of PHY and Attached devices' supported link modes */
0656     /* See ethtool.h for more info */
0657     __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
0658     __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
0659     __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
0660     /* used with phy_speed_down */
0661     __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
0662 
0663     /* Energy efficient ethernet modes which should be prohibited */
0664     u32 eee_broken_modes;
0665 
0666 #ifdef CONFIG_LED_TRIGGER_PHY
0667     struct phy_led_trigger *phy_led_triggers;
0668     unsigned int phy_num_led_triggers;
0669     struct phy_led_trigger *last_triggered;
0670 
0671     struct phy_led_trigger *led_link_trigger;
0672 #endif
0673 
0674     /*
0675      * Interrupt number for this PHY
0676      * -1 means no interrupt
0677      */
0678     int irq;
0679 
0680     /* private data pointer */
0681     /* For use by PHYs to maintain extra state */
0682     void *priv;
0683 
0684     /* shared data pointer */
0685     /* For use by PHYs inside the same package that need a shared state. */
0686     struct phy_package_shared *shared;
0687 
0688     /* Reporting cable test results */
0689     struct sk_buff *skb;
0690     void *ehdr;
0691     struct nlattr *nest;
0692 
0693     /* Interrupt and Polling infrastructure */
0694     struct delayed_work state_queue;
0695 
0696     struct mutex lock;
0697 
0698     /* This may be modified under the rtnl lock */
0699     bool sfp_bus_attached;
0700     struct sfp_bus *sfp_bus;
0701     struct phylink *phylink;
0702     struct net_device *attached_dev;
0703     struct mii_timestamper *mii_ts;
0704 
0705     u8 mdix;
0706     u8 mdix_ctrl;
0707 
0708     int pma_extable;
0709 
0710     void (*phy_link_change)(struct phy_device *phydev, bool up);
0711     void (*adjust_link)(struct net_device *dev);
0712 
0713 #if IS_ENABLED(CONFIG_MACSEC)
0714     /* MACsec management functions */
0715     const struct macsec_ops *macsec_ops;
0716 #endif
0717 };
0718 
0719 static inline struct phy_device *to_phy_device(const struct device *dev)
0720 {
0721     return container_of(to_mdio_device(dev), struct phy_device, mdio);
0722 }
0723 
0724 /**
0725  * struct phy_tdr_config - Configuration of a TDR raw test
0726  *
0727  * @first: Distance for first data collection point
0728  * @last: Distance for last data collection point
0729  * @step: Step between data collection points
0730  * @pair: Bitmap of cable pairs to collect data for
0731  *
0732  * A structure containing possible configuration parameters
0733  * for a TDR cable test. The driver does not need to implement
0734  * all the parameters, but should report what is actually used.
0735  * All distances are in centimeters.
0736  */
0737 struct phy_tdr_config {
0738     u32 first;
0739     u32 last;
0740     u32 step;
0741     s8 pair;
0742 };
0743 #define PHY_PAIR_ALL -1
0744 
0745 /**
0746  * struct phy_driver - Driver structure for a particular PHY type
0747  *
0748  * @mdiodrv: Data common to all MDIO devices
0749  * @phy_id: The result of reading the UID registers of this PHY
0750  *   type, and ANDing them with the phy_id_mask.  This driver
0751  *   only works for PHYs with IDs which match this field
0752  * @name: The friendly name of this PHY type
0753  * @phy_id_mask: Defines the important bits of the phy_id
0754  * @features: A mandatory list of features (speed, duplex, etc)
0755  *   supported by this PHY
0756  * @flags: A bitfield defining certain other features this PHY
0757  *   supports (like interrupts)
0758  * @driver_data: Static driver data
0759  *
0760  * All functions are optional. If config_aneg or read_status
0761  * are not implemented, the phy core uses the genphy versions.
0762  * Note that none of these functions should be called from
0763  * interrupt time. The goal is for the bus read/write functions
0764  * to be able to block when the bus transaction is happening,
0765  * and be freed up by an interrupt (The MPC85xx has this ability,
0766  * though it is not currently supported in the driver).
0767  */
0768 struct phy_driver {
0769     struct mdio_driver_common mdiodrv;
0770     u32 phy_id;
0771     char *name;
0772     u32 phy_id_mask;
0773     const unsigned long * const features;
0774     u32 flags;
0775     const void *driver_data;
0776 
0777     /**
0778      * @soft_reset: Called to issue a PHY software reset
0779      */
0780     int (*soft_reset)(struct phy_device *phydev);
0781 
0782     /**
0783      * @config_init: Called to initialize the PHY,
0784      * including after a reset
0785      */
0786     int (*config_init)(struct phy_device *phydev);
0787 
0788     /**
0789      * @probe: Called during discovery.  Used to set
0790      * up device-specific structures, if any
0791      */
0792     int (*probe)(struct phy_device *phydev);
0793 
0794     /**
0795      * @get_features: Probe the hardware to determine what
0796      * abilities it has.  Should only set phydev->supported.
0797      */
0798     int (*get_features)(struct phy_device *phydev);
0799 
0800     /* PHY Power Management */
0801     /** @suspend: Suspend the hardware, saving state if needed */
0802     int (*suspend)(struct phy_device *phydev);
0803     /** @resume: Resume the hardware, restoring state if needed */
0804     int (*resume)(struct phy_device *phydev);
0805 
0806     /**
0807      * @config_aneg: Configures the advertisement and resets
0808      * autonegotiation if phydev->autoneg is on,
0809      * forces the speed to the current settings in phydev
0810      * if phydev->autoneg is off
0811      */
0812     int (*config_aneg)(struct phy_device *phydev);
0813 
0814     /** @aneg_done: Determines the auto negotiation result */
0815     int (*aneg_done)(struct phy_device *phydev);
0816 
0817     /** @read_status: Determines the negotiated speed and duplex */
0818     int (*read_status)(struct phy_device *phydev);
0819 
0820     /**
0821      * @config_intr: Enables or disables interrupts.
0822      * It should also clear any pending interrupts prior to enabling the
0823      * IRQs and after disabling them.
0824      */
0825     int (*config_intr)(struct phy_device *phydev);
0826 
0827     /** @handle_interrupt: Override default interrupt handling */
0828     irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
0829 
0830     /** @remove: Clears up any memory if needed */
0831     void (*remove)(struct phy_device *phydev);
0832 
0833     /**
0834      * @match_phy_device: Returns true if this is a suitable
0835      * driver for the given phydev.  If NULL, matching is based on
0836      * phy_id and phy_id_mask.
0837      */
0838     int (*match_phy_device)(struct phy_device *phydev);
0839 
0840     /**
0841      * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
0842      * register changes to enable Wake on LAN, so set_wol is
0843      * provided to be called in the ethernet driver's set_wol
0844      * function.
0845      */
0846     int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
0847 
0848     /**
0849      * @get_wol: See set_wol, but for checking whether Wake on LAN
0850      * is enabled.
0851      */
0852     void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
0853 
0854     /**
0855      * @link_change_notify: Called to inform a PHY device driver
0856      * when the core is about to change the link state. This
0857      * callback is supposed to be used as fixup hook for drivers
0858      * that need to take action when the link state
0859      * changes. Drivers are by no means allowed to mess with the
0860      * PHY device structure in their implementations.
0861      */
0862     void (*link_change_notify)(struct phy_device *dev);
0863 
0864     /**
0865      * @read_mmd: PHY specific driver override for reading a MMD
0866      * register.  This function is optional for PHY specific
0867      * drivers.  When not provided, the default MMD read function
0868      * will be used by phy_read_mmd(), which will use either a
0869      * direct read for Clause 45 PHYs or an indirect read for
0870      * Clause 22 PHYs.  devnum is the MMD device number within the
0871      * PHY device, regnum is the register within the selected MMD
0872      * device.
0873      */
0874     int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
0875 
0876     /**
0877      * @write_mmd: PHY specific driver override for writing a MMD
0878      * register.  This function is optional for PHY specific
0879      * drivers.  When not provided, the default MMD write function
0880      * will be used by phy_write_mmd(), which will use either a
0881      * direct write for Clause 45 PHYs, or an indirect write for
0882      * Clause 22 PHYs.  devnum is the MMD device number within the
0883      * PHY device, regnum is the register within the selected MMD
0884      * device.  val is the value to be written.
0885      */
0886     int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
0887              u16 val);
0888 
0889     /** @read_page: Return the current PHY register page number */
0890     int (*read_page)(struct phy_device *dev);
0891     /** @write_page: Set the current PHY register page number */
0892     int (*write_page)(struct phy_device *dev, int page);
0893 
0894     /**
0895      * @module_info: Get the size and type of the eeprom contained
0896      * within a plug-in module
0897      */
0898     int (*module_info)(struct phy_device *dev,
0899                struct ethtool_modinfo *modinfo);
0900 
0901     /**
0902      * @module_eeprom: Get the eeprom information from the plug-in
0903      * module
0904      */
0905     int (*module_eeprom)(struct phy_device *dev,
0906                  struct ethtool_eeprom *ee, u8 *data);
0907 
0908     /** @cable_test_start: Start a cable test */
0909     int (*cable_test_start)(struct phy_device *dev);
0910 
0911     /**  @cable_test_tdr_start: Start a raw TDR cable test */
0912     int (*cable_test_tdr_start)(struct phy_device *dev,
0913                     const struct phy_tdr_config *config);
0914 
0915     /**
0916      * @cable_test_get_status: Once per second, or on interrupt,
0917      * request the status of the test.
0918      */
0919     int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
0920 
0921     /* Get statistics from the PHY using ethtool */
0922     /** @get_sset_count: Number of statistic counters */
0923     int (*get_sset_count)(struct phy_device *dev);
0924     /** @get_strings: Names of the statistic counters */
0925     void (*get_strings)(struct phy_device *dev, u8 *data);
0926     /** @get_stats: Return the statistic counter values */
0927     void (*get_stats)(struct phy_device *dev,
0928               struct ethtool_stats *stats, u64 *data);
0929 
0930     /* Get and Set PHY tunables */
0931     /** @get_tunable: Return the value of a tunable */
0932     int (*get_tunable)(struct phy_device *dev,
0933                struct ethtool_tunable *tuna, void *data);
0934     /** @set_tunable: Set the value of a tunable */
0935     int (*set_tunable)(struct phy_device *dev,
0936                 struct ethtool_tunable *tuna,
0937                 const void *data);
0938     /** @set_loopback: Set the loopback mood of the PHY */
0939     int (*set_loopback)(struct phy_device *dev, bool enable);
0940     /** @get_sqi: Get the signal quality indication */
0941     int (*get_sqi)(struct phy_device *dev);
0942     /** @get_sqi_max: Get the maximum signal quality indication */
0943     int (*get_sqi_max)(struct phy_device *dev);
0944 };
0945 #define to_phy_driver(d) container_of(to_mdio_common_driver(d),     \
0946                       struct phy_driver, mdiodrv)
0947 
0948 #define PHY_ANY_ID "MATCH ANY PHY"
0949 #define PHY_ANY_UID 0xffffffff
0950 
0951 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
0952 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
0953 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
0954 
0955 /* A Structure for boards to register fixups with the PHY Lib */
0956 struct phy_fixup {
0957     struct list_head list;
0958     char bus_id[MII_BUS_ID_SIZE + 3];
0959     u32 phy_uid;
0960     u32 phy_uid_mask;
0961     int (*run)(struct phy_device *phydev);
0962 };
0963 
0964 const char *phy_speed_to_str(int speed);
0965 const char *phy_duplex_to_str(unsigned int duplex);
0966 
0967 /* A structure for mapping a particular speed and duplex
0968  * combination to a particular SUPPORTED and ADVERTISED value
0969  */
0970 struct phy_setting {
0971     u32 speed;
0972     u8 duplex;
0973     u8 bit;
0974 };
0975 
0976 const struct phy_setting *
0977 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
0978            bool exact);
0979 size_t phy_speeds(unsigned int *speeds, size_t size,
0980           unsigned long *mask);
0981 void of_set_phy_supported(struct phy_device *phydev);
0982 void of_set_phy_eee_broken(struct phy_device *phydev);
0983 int phy_speed_down_core(struct phy_device *phydev);
0984 
0985 /**
0986  * phy_is_started - Convenience function to check whether PHY is started
0987  * @phydev: The phy_device struct
0988  */
0989 static inline bool phy_is_started(struct phy_device *phydev)
0990 {
0991     return phydev->state >= PHY_UP;
0992 }
0993 
0994 void phy_resolve_aneg_pause(struct phy_device *phydev);
0995 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
0996 void phy_check_downshift(struct phy_device *phydev);
0997 
0998 /**
0999  * phy_read - Convenience function for reading a given PHY register
1000  * @phydev: the phy_device struct
1001  * @regnum: register number to read
1002  *
1003  * NOTE: MUST NOT be called from interrupt context,
1004  * because the bus read/write functions may wait for an interrupt
1005  * to conclude the operation.
1006  */
1007 static inline int phy_read(struct phy_device *phydev, u32 regnum)
1008 {
1009     return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1010 }
1011 
1012 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1013                 timeout_us, sleep_before_read) \
1014 ({ \
1015     int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
1016         sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1017     if (val <  0) \
1018         __ret = val; \
1019     if (__ret) \
1020         phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1021     __ret; \
1022 })
1023 
1024 
1025 /**
1026  * __phy_read - convenience function for reading a given PHY register
1027  * @phydev: the phy_device struct
1028  * @regnum: register number to read
1029  *
1030  * The caller must have taken the MDIO bus lock.
1031  */
1032 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1033 {
1034     return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1035 }
1036 
1037 /**
1038  * phy_write - Convenience function for writing a given PHY register
1039  * @phydev: the phy_device struct
1040  * @regnum: register number to write
1041  * @val: value to write to @regnum
1042  *
1043  * NOTE: MUST NOT be called from interrupt context,
1044  * because the bus read/write functions may wait for an interrupt
1045  * to conclude the operation.
1046  */
1047 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1048 {
1049     return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1050 }
1051 
1052 /**
1053  * __phy_write - Convenience function for writing a given PHY register
1054  * @phydev: the phy_device struct
1055  * @regnum: register number to write
1056  * @val: value to write to @regnum
1057  *
1058  * The caller must have taken the MDIO bus lock.
1059  */
1060 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1061 {
1062     return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1063                    val);
1064 }
1065 
1066 /**
1067  * __phy_modify_changed() - Convenience function for modifying a PHY register
1068  * @phydev: a pointer to a &struct phy_device
1069  * @regnum: register number
1070  * @mask: bit mask of bits to clear
1071  * @set: bit mask of bits to set
1072  *
1073  * Unlocked helper function which allows a PHY register to be modified as
1074  * new register value = (old register value & ~mask) | set
1075  *
1076  * Returns negative errno, 0 if there was no change, and 1 in case of change
1077  */
1078 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1079                        u16 mask, u16 set)
1080 {
1081     return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1082                     regnum, mask, set);
1083 }
1084 
1085 /*
1086  * phy_read_mmd - Convenience function for reading a register
1087  * from an MMD on a given PHY.
1088  */
1089 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1090 
1091 /**
1092  * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1093  *                             condition is met or a timeout occurs
1094  *
1095  * @phydev: The phy_device struct
1096  * @devaddr: The MMD to read from
1097  * @regnum: The register on the MMD to read
1098  * @val: Variable to read the register into
1099  * @cond: Break condition (usually involving @val)
1100  * @sleep_us: Maximum time to sleep between reads in us (0
1101  *            tight-loops).  Should be less than ~20ms since usleep_range
1102  *            is used (see Documentation/timers/timers-howto.rst).
1103  * @timeout_us: Timeout in us, 0 means never timeout
1104  * @sleep_before_read: if it is true, sleep @sleep_us before read.
1105  * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1106  * case, the last read value at @args is stored in @val. Must not
1107  * be called from atomic context if sleep_us or timeout_us are used.
1108  */
1109 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1110                   sleep_us, timeout_us, sleep_before_read) \
1111 ({ \
1112     int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1113                   sleep_us, timeout_us, sleep_before_read, \
1114                   phydev, devaddr, regnum); \
1115     if (val <  0) \
1116         __ret = val; \
1117     if (__ret) \
1118         phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1119     __ret; \
1120 })
1121 
1122 /*
1123  * __phy_read_mmd - Convenience function for reading a register
1124  * from an MMD on a given PHY.
1125  */
1126 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1127 
1128 /*
1129  * phy_write_mmd - Convenience function for writing a register
1130  * on an MMD on a given PHY.
1131  */
1132 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1133 
1134 /*
1135  * __phy_write_mmd - Convenience function for writing a register
1136  * on an MMD on a given PHY.
1137  */
1138 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1139 
1140 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1141              u16 set);
1142 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1143                u16 set);
1144 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1145 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1146 
1147 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1148                  u16 mask, u16 set);
1149 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1150                u16 mask, u16 set);
1151 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1152              u16 mask, u16 set);
1153 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1154            u16 mask, u16 set);
1155 
1156 /**
1157  * __phy_set_bits - Convenience function for setting bits in a PHY register
1158  * @phydev: the phy_device struct
1159  * @regnum: register number to write
1160  * @val: bits to set
1161  *
1162  * The caller must have taken the MDIO bus lock.
1163  */
1164 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1165 {
1166     return __phy_modify(phydev, regnum, 0, val);
1167 }
1168 
1169 /**
1170  * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1171  * @phydev: the phy_device struct
1172  * @regnum: register number to write
1173  * @val: bits to clear
1174  *
1175  * The caller must have taken the MDIO bus lock.
1176  */
1177 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1178                    u16 val)
1179 {
1180     return __phy_modify(phydev, regnum, val, 0);
1181 }
1182 
1183 /**
1184  * phy_set_bits - Convenience function for setting bits in a PHY register
1185  * @phydev: the phy_device struct
1186  * @regnum: register number to write
1187  * @val: bits to set
1188  */
1189 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1190 {
1191     return phy_modify(phydev, regnum, 0, val);
1192 }
1193 
1194 /**
1195  * phy_clear_bits - Convenience function for clearing bits in a PHY register
1196  * @phydev: the phy_device struct
1197  * @regnum: register number to write
1198  * @val: bits to clear
1199  */
1200 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1201 {
1202     return phy_modify(phydev, regnum, val, 0);
1203 }
1204 
1205 /**
1206  * __phy_set_bits_mmd - Convenience function for setting bits in a register
1207  * on MMD
1208  * @phydev: the phy_device struct
1209  * @devad: the MMD containing register to modify
1210  * @regnum: register number to modify
1211  * @val: bits to set
1212  *
1213  * The caller must have taken the MDIO bus lock.
1214  */
1215 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1216         u32 regnum, u16 val)
1217 {
1218     return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1219 }
1220 
1221 /**
1222  * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1223  * on MMD
1224  * @phydev: the phy_device struct
1225  * @devad: the MMD containing register to modify
1226  * @regnum: register number to modify
1227  * @val: bits to clear
1228  *
1229  * The caller must have taken the MDIO bus lock.
1230  */
1231 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1232         u32 regnum, u16 val)
1233 {
1234     return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1235 }
1236 
1237 /**
1238  * phy_set_bits_mmd - Convenience function for setting bits in a register
1239  * on MMD
1240  * @phydev: the phy_device struct
1241  * @devad: the MMD containing register to modify
1242  * @regnum: register number to modify
1243  * @val: bits to set
1244  */
1245 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1246         u32 regnum, u16 val)
1247 {
1248     return phy_modify_mmd(phydev, devad, regnum, 0, val);
1249 }
1250 
1251 /**
1252  * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1253  * on MMD
1254  * @phydev: the phy_device struct
1255  * @devad: the MMD containing register to modify
1256  * @regnum: register number to modify
1257  * @val: bits to clear
1258  */
1259 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1260         u32 regnum, u16 val)
1261 {
1262     return phy_modify_mmd(phydev, devad, regnum, val, 0);
1263 }
1264 
1265 /**
1266  * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1267  * @phydev: the phy_device struct
1268  *
1269  * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1270  * PHY_MAC_INTERRUPT
1271  */
1272 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1273 {
1274     return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1275 }
1276 
1277 /**
1278  * phy_polling_mode - Convenience function for testing whether polling is
1279  * used to detect PHY status changes
1280  * @phydev: the phy_device struct
1281  */
1282 static inline bool phy_polling_mode(struct phy_device *phydev)
1283 {
1284     if (phydev->state == PHY_CABLETEST)
1285         if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1286             return true;
1287 
1288     return phydev->irq == PHY_POLL;
1289 }
1290 
1291 /**
1292  * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1293  * @phydev: the phy_device struct
1294  */
1295 static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1296 {
1297     return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1298 }
1299 
1300 /**
1301  * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1302  * @phydev: the phy_device struct
1303  */
1304 static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1305 {
1306     return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1307 }
1308 
1309 /**
1310  * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1311  * PTP hardware clock capabilities.
1312  * @phydev: the phy_device struct
1313  */
1314 static inline bool phy_has_tsinfo(struct phy_device *phydev)
1315 {
1316     return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1317 }
1318 
1319 /**
1320  * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1321  * @phydev: the phy_device struct
1322  */
1323 static inline bool phy_has_txtstamp(struct phy_device *phydev)
1324 {
1325     return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1326 }
1327 
1328 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1329 {
1330     return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1331 }
1332 
1333 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1334                 int type)
1335 {
1336     return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1337 }
1338 
1339 static inline int phy_ts_info(struct phy_device *phydev,
1340                   struct ethtool_ts_info *tsinfo)
1341 {
1342     return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1343 }
1344 
1345 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1346                 int type)
1347 {
1348     phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1349 }
1350 
1351 /**
1352  * phy_is_internal - Convenience function for testing if a PHY is internal
1353  * @phydev: the phy_device struct
1354  */
1355 static inline bool phy_is_internal(struct phy_device *phydev)
1356 {
1357     return phydev->is_internal;
1358 }
1359 
1360 /**
1361  * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1362  * @phydev: the phy_device struct
1363  */
1364 static inline bool phy_on_sfp(struct phy_device *phydev)
1365 {
1366     return phydev->is_on_sfp_module;
1367 }
1368 
1369 /**
1370  * phy_interface_mode_is_rgmii - Convenience function for testing if a
1371  * PHY interface mode is RGMII (all variants)
1372  * @mode: the &phy_interface_t enum
1373  */
1374 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1375 {
1376     return mode >= PHY_INTERFACE_MODE_RGMII &&
1377         mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1378 };
1379 
1380 /**
1381  * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1382  *   negotiation
1383  * @mode: one of &enum phy_interface_t
1384  *
1385  * Returns true if the PHY interface mode uses the 16-bit negotiation
1386  * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1387  */
1388 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1389 {
1390     return mode == PHY_INTERFACE_MODE_1000BASEX ||
1391            mode == PHY_INTERFACE_MODE_2500BASEX;
1392 }
1393 
1394 /**
1395  * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1396  * is RGMII (all variants)
1397  * @phydev: the phy_device struct
1398  */
1399 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1400 {
1401     return phy_interface_mode_is_rgmii(phydev->interface);
1402 };
1403 
1404 /**
1405  * phy_is_pseudo_fixed_link - Convenience function for testing if this
1406  * PHY is the CPU port facing side of an Ethernet switch, or similar.
1407  * @phydev: the phy_device struct
1408  */
1409 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1410 {
1411     return phydev->is_pseudo_fixed_link;
1412 }
1413 
1414 int phy_save_page(struct phy_device *phydev);
1415 int phy_select_page(struct phy_device *phydev, int page);
1416 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1417 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1418 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1419 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1420                  u16 mask, u16 set);
1421 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1422              u16 mask, u16 set);
1423 
1424 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1425                      bool is_c45,
1426                      struct phy_c45_device_ids *c45_ids);
1427 #if IS_ENABLED(CONFIG_PHYLIB)
1428 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1429 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1430 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1431 struct phy_device *device_phy_find_device(struct device *dev);
1432 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode);
1433 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1434 int phy_device_register(struct phy_device *phy);
1435 void phy_device_free(struct phy_device *phydev);
1436 #else
1437 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1438 {
1439     return 0;
1440 }
1441 static inline
1442 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1443 {
1444     return 0;
1445 }
1446 
1447 static inline
1448 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1449 {
1450     return NULL;
1451 }
1452 
1453 static inline struct phy_device *device_phy_find_device(struct device *dev)
1454 {
1455     return NULL;
1456 }
1457 
1458 static inline
1459 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1460 {
1461     return NULL;
1462 }
1463 
1464 static inline
1465 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1466 {
1467     return NULL;
1468 }
1469 
1470 static inline int phy_device_register(struct phy_device *phy)
1471 {
1472     return 0;
1473 }
1474 
1475 static inline void phy_device_free(struct phy_device *phydev) { }
1476 #endif /* CONFIG_PHYLIB */
1477 void phy_device_remove(struct phy_device *phydev);
1478 int phy_get_c45_ids(struct phy_device *phydev);
1479 int phy_init_hw(struct phy_device *phydev);
1480 int phy_suspend(struct phy_device *phydev);
1481 int phy_resume(struct phy_device *phydev);
1482 int __phy_resume(struct phy_device *phydev);
1483 int phy_loopback(struct phy_device *phydev, bool enable);
1484 void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1485 void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1486 int phy_sfp_probe(struct phy_device *phydev,
1487               const struct sfp_upstream_ops *ops);
1488 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1489                   phy_interface_t interface);
1490 struct phy_device *phy_find_first(struct mii_bus *bus);
1491 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1492               u32 flags, phy_interface_t interface);
1493 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1494                void (*handler)(struct net_device *),
1495                phy_interface_t interface);
1496 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1497                    void (*handler)(struct net_device *),
1498                    phy_interface_t interface);
1499 void phy_disconnect(struct phy_device *phydev);
1500 void phy_detach(struct phy_device *phydev);
1501 void phy_start(struct phy_device *phydev);
1502 void phy_stop(struct phy_device *phydev);
1503 int phy_config_aneg(struct phy_device *phydev);
1504 int phy_start_aneg(struct phy_device *phydev);
1505 int phy_aneg_done(struct phy_device *phydev);
1506 int phy_speed_down(struct phy_device *phydev, bool sync);
1507 int phy_speed_up(struct phy_device *phydev);
1508 
1509 int phy_restart_aneg(struct phy_device *phydev);
1510 int phy_reset_after_clk_enable(struct phy_device *phydev);
1511 
1512 #if IS_ENABLED(CONFIG_PHYLIB)
1513 int phy_start_cable_test(struct phy_device *phydev,
1514              struct netlink_ext_ack *extack);
1515 int phy_start_cable_test_tdr(struct phy_device *phydev,
1516                  struct netlink_ext_ack *extack,
1517                  const struct phy_tdr_config *config);
1518 #else
1519 static inline
1520 int phy_start_cable_test(struct phy_device *phydev,
1521              struct netlink_ext_ack *extack)
1522 {
1523     NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1524     return -EOPNOTSUPP;
1525 }
1526 static inline
1527 int phy_start_cable_test_tdr(struct phy_device *phydev,
1528                  struct netlink_ext_ack *extack,
1529                  const struct phy_tdr_config *config)
1530 {
1531     NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1532     return -EOPNOTSUPP;
1533 }
1534 #endif
1535 
1536 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1537 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1538                 u16 cm);
1539 
1540 static inline void phy_device_reset(struct phy_device *phydev, int value)
1541 {
1542     mdio_device_reset(&phydev->mdio, value);
1543 }
1544 
1545 #define phydev_err(_phydev, format, args...)    \
1546     dev_err(&_phydev->mdio.dev, format, ##args)
1547 
1548 #define phydev_err_probe(_phydev, err, format, args...) \
1549     dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1550 
1551 #define phydev_info(_phydev, format, args...)   \
1552     dev_info(&_phydev->mdio.dev, format, ##args)
1553 
1554 #define phydev_warn(_phydev, format, args...)   \
1555     dev_warn(&_phydev->mdio.dev, format, ##args)
1556 
1557 #define phydev_dbg(_phydev, format, args...)    \
1558     dev_dbg(&_phydev->mdio.dev, format, ##args)
1559 
1560 static inline const char *phydev_name(const struct phy_device *phydev)
1561 {
1562     return dev_name(&phydev->mdio.dev);
1563 }
1564 
1565 static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1566 {
1567     mutex_lock(&phydev->mdio.bus->mdio_lock);
1568 }
1569 
1570 static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1571 {
1572     mutex_unlock(&phydev->mdio.bus->mdio_lock);
1573 }
1574 
1575 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1576     __printf(2, 3);
1577 char *phy_attached_info_irq(struct phy_device *phydev)
1578     __malloc;
1579 void phy_attached_info(struct phy_device *phydev);
1580 
1581 /* Clause 22 PHY */
1582 int genphy_read_abilities(struct phy_device *phydev);
1583 int genphy_setup_forced(struct phy_device *phydev);
1584 int genphy_restart_aneg(struct phy_device *phydev);
1585 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1586 int genphy_config_eee_advert(struct phy_device *phydev);
1587 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1588 int genphy_aneg_done(struct phy_device *phydev);
1589 int genphy_update_link(struct phy_device *phydev);
1590 int genphy_read_lpa(struct phy_device *phydev);
1591 int genphy_read_status_fixed(struct phy_device *phydev);
1592 int genphy_read_status(struct phy_device *phydev);
1593 int genphy_read_master_slave(struct phy_device *phydev);
1594 int genphy_suspend(struct phy_device *phydev);
1595 int genphy_resume(struct phy_device *phydev);
1596 int genphy_loopback(struct phy_device *phydev, bool enable);
1597 int genphy_soft_reset(struct phy_device *phydev);
1598 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1599 
1600 static inline int genphy_config_aneg(struct phy_device *phydev)
1601 {
1602     return __genphy_config_aneg(phydev, false);
1603 }
1604 
1605 static inline int genphy_no_config_intr(struct phy_device *phydev)
1606 {
1607     return 0;
1608 }
1609 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1610                 u16 regnum);
1611 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1612                  u16 regnum, u16 val);
1613 
1614 /* Clause 37 */
1615 int genphy_c37_config_aneg(struct phy_device *phydev);
1616 int genphy_c37_read_status(struct phy_device *phydev);
1617 
1618 /* Clause 45 PHY */
1619 int genphy_c45_restart_aneg(struct phy_device *phydev);
1620 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1621 int genphy_c45_aneg_done(struct phy_device *phydev);
1622 int genphy_c45_read_link(struct phy_device *phydev);
1623 int genphy_c45_read_lpa(struct phy_device *phydev);
1624 int genphy_c45_read_pma(struct phy_device *phydev);
1625 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1626 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1627 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1628 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1629 int genphy_c45_read_mdix(struct phy_device *phydev);
1630 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1631 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1632 int genphy_c45_read_status(struct phy_device *phydev);
1633 int genphy_c45_baset1_read_status(struct phy_device *phydev);
1634 int genphy_c45_config_aneg(struct phy_device *phydev);
1635 int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1636 int genphy_c45_pma_resume(struct phy_device *phydev);
1637 int genphy_c45_pma_suspend(struct phy_device *phydev);
1638 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1639 
1640 /* Generic C45 PHY driver */
1641 extern struct phy_driver genphy_c45_driver;
1642 
1643 /* The gen10g_* functions are the old Clause 45 stub */
1644 int gen10g_config_aneg(struct phy_device *phydev);
1645 
1646 static inline int phy_read_status(struct phy_device *phydev)
1647 {
1648     if (!phydev->drv)
1649         return -EIO;
1650 
1651     if (phydev->drv->read_status)
1652         return phydev->drv->read_status(phydev);
1653     else
1654         return genphy_read_status(phydev);
1655 }
1656 
1657 void phy_driver_unregister(struct phy_driver *drv);
1658 void phy_drivers_unregister(struct phy_driver *drv, int n);
1659 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1660 int phy_drivers_register(struct phy_driver *new_driver, int n,
1661              struct module *owner);
1662 void phy_error(struct phy_device *phydev);
1663 void phy_state_machine(struct work_struct *work);
1664 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1665 void phy_trigger_machine(struct phy_device *phydev);
1666 void phy_mac_interrupt(struct phy_device *phydev);
1667 void phy_start_machine(struct phy_device *phydev);
1668 void phy_stop_machine(struct phy_device *phydev);
1669 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1670                    struct ethtool_link_ksettings *cmd);
1671 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1672                   const struct ethtool_link_ksettings *cmd);
1673 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1674 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1675 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1676 int phy_disable_interrupts(struct phy_device *phydev);
1677 void phy_request_interrupt(struct phy_device *phydev);
1678 void phy_free_interrupt(struct phy_device *phydev);
1679 void phy_print_status(struct phy_device *phydev);
1680 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1681 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1682 void phy_advertise_supported(struct phy_device *phydev);
1683 void phy_support_sym_pause(struct phy_device *phydev);
1684 void phy_support_asym_pause(struct phy_device *phydev);
1685 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1686                bool autoneg);
1687 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1688 bool phy_validate_pause(struct phy_device *phydev,
1689             struct ethtool_pauseparam *pp);
1690 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1691 
1692 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1693                const int *delay_values, int size, bool is_rx);
1694 
1695 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1696                bool *tx_pause, bool *rx_pause);
1697 
1698 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1699                int (*run)(struct phy_device *));
1700 int phy_register_fixup_for_id(const char *bus_id,
1701                   int (*run)(struct phy_device *));
1702 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1703                    int (*run)(struct phy_device *));
1704 
1705 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1706 int phy_unregister_fixup_for_id(const char *bus_id);
1707 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1708 
1709 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1710 int phy_get_eee_err(struct phy_device *phydev);
1711 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1712 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1713 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1714 void phy_ethtool_get_wol(struct phy_device *phydev,
1715              struct ethtool_wolinfo *wol);
1716 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1717                    struct ethtool_link_ksettings *cmd);
1718 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1719                    const struct ethtool_link_ksettings *cmd);
1720 int phy_ethtool_nway_reset(struct net_device *ndev);
1721 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1722 void phy_package_leave(struct phy_device *phydev);
1723 int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1724               int addr, size_t priv_size);
1725 
1726 #if IS_ENABLED(CONFIG_PHYLIB)
1727 int __init mdio_bus_init(void);
1728 void mdio_bus_exit(void);
1729 #endif
1730 
1731 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1732 int phy_ethtool_get_sset_count(struct phy_device *phydev);
1733 int phy_ethtool_get_stats(struct phy_device *phydev,
1734               struct ethtool_stats *stats, u64 *data);
1735 
1736 static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1737 {
1738     struct phy_package_shared *shared = phydev->shared;
1739 
1740     if (!shared)
1741         return -EIO;
1742 
1743     return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1744 }
1745 
1746 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1747 {
1748     struct phy_package_shared *shared = phydev->shared;
1749 
1750     if (!shared)
1751         return -EIO;
1752 
1753     return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1754 }
1755 
1756 static inline int phy_package_write(struct phy_device *phydev,
1757                     u32 regnum, u16 val)
1758 {
1759     struct phy_package_shared *shared = phydev->shared;
1760 
1761     if (!shared)
1762         return -EIO;
1763 
1764     return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1765 }
1766 
1767 static inline int __phy_package_write(struct phy_device *phydev,
1768                       u32 regnum, u16 val)
1769 {
1770     struct phy_package_shared *shared = phydev->shared;
1771 
1772     if (!shared)
1773         return -EIO;
1774 
1775     return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1776 }
1777 
1778 static inline bool __phy_package_set_once(struct phy_device *phydev,
1779                       unsigned int b)
1780 {
1781     struct phy_package_shared *shared = phydev->shared;
1782 
1783     if (!shared)
1784         return false;
1785 
1786     return !test_and_set_bit(b, &shared->flags);
1787 }
1788 
1789 static inline bool phy_package_init_once(struct phy_device *phydev)
1790 {
1791     return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1792 }
1793 
1794 static inline bool phy_package_probe_once(struct phy_device *phydev)
1795 {
1796     return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
1797 }
1798 
1799 extern struct bus_type mdio_bus_type;
1800 
1801 struct mdio_board_info {
1802     const char  *bus_id;
1803     char        modalias[MDIO_NAME_SIZE];
1804     int     mdio_addr;
1805     const void  *platform_data;
1806 };
1807 
1808 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
1809 int mdiobus_register_board_info(const struct mdio_board_info *info,
1810                 unsigned int n);
1811 #else
1812 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1813                           unsigned int n)
1814 {
1815     return 0;
1816 }
1817 #endif
1818 
1819 
1820 /**
1821  * phy_module_driver() - Helper macro for registering PHY drivers
1822  * @__phy_drivers: array of PHY drivers to register
1823  * @__count: Numbers of members in array
1824  *
1825  * Helper macro for PHY drivers which do not do anything special in module
1826  * init/exit. Each module may only use this macro once, and calling it
1827  * replaces module_init() and module_exit().
1828  */
1829 #define phy_module_driver(__phy_drivers, __count)           \
1830 static int __init phy_module_init(void)                 \
1831 {                                   \
1832     return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1833 }                                   \
1834 module_init(phy_module_init);                       \
1835 static void __exit phy_module_exit(void)                \
1836 {                                   \
1837     phy_drivers_unregister(__phy_drivers, __count);         \
1838 }                                   \
1839 module_exit(phy_module_exit)
1840 
1841 #define module_phy_driver(__phy_drivers)                \
1842     phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1843 
1844 bool phy_driver_is_genphy(struct phy_device *phydev);
1845 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1846 
1847 #endif /* __PHY_H */
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