include/linux/pci-epc.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * PCI Endpoint *Controller* (EPC) header file
0004  *
0005  * Copyright (C) 2017 Texas Instruments
0006  * Author: Kishon Vijay Abraham I <kishon@ti.com>
0007  */
0008
0009 #ifndef __LINUX_PCI_EPC_H
0010 #define __LINUX_PCI_EPC_H
0011
0012 #include <linux/pci-epf.h>
0013
0014 struct pci_epc;
0015
0016 enum pci_epc_interface_type {
0017     UNKNOWN_INTERFACE = -1,
0018     PRIMARY_INTERFACE,
0019     SECONDARY_INTERFACE,
0020 };
0021
0022 enum pci_epc_irq_type {
0023     PCI_EPC_IRQ_UNKNOWN,
0024     PCI_EPC_IRQ_LEGACY,
0025     PCI_EPC_IRQ_MSI,
0026     PCI_EPC_IRQ_MSIX,
0027 };
0028
0029 static inline const char *
0030 pci_epc_interface_string(enum pci_epc_interface_type type)
0031 {
0032     switch (type) {
0033     case PRIMARY_INTERFACE:
0034         return "primary";
0035     case SECONDARY_INTERFACE:
0036         return "secondary";
0037     default:
0038         return "UNKNOWN interface";
0039     }
0040 }
0041
0042 /**
0043  * struct pci_epc_ops - set of function pointers for performing EPC operations
0044  * @write_header: ops to populate configuration space header
0045  * @set_bar: ops to configure the BAR
0046  * @clear_bar: ops to reset the BAR
0047  * @map_addr: ops to map CPU address to PCI address
0048  * @unmap_addr: ops to unmap CPU address and PCI address
0049  * @set_msi: ops to set the requested number of MSI interrupts in the MSI
0050  *       capability register
0051  * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
0052  *       the MSI capability register
0053  * @set_msix: ops to set the requested number of MSI-X interrupts in the
0054  *       MSI-X capability register
0055  * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC
0056  *       from the MSI-X capability register
0057  * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
0058  * @map_msi_irq: ops to map physical address to MSI address and return MSI data
0059  * @start: ops to start the PCI link
0060  * @stop: ops to stop the PCI link
0061  * @get_features: ops to get the features supported by the EPC
0062  * @owner: the module owner containing the ops
0063  */
0064 struct pci_epc_ops {
0065     int (*write_header)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0066                 struct pci_epf_header *hdr);
0067     int (*set_bar)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0068                struct pci_epf_bar *epf_bar);
0069     void    (*clear_bar)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0070                  struct pci_epf_bar *epf_bar);
0071     int (*map_addr)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0072                 phys_addr_t addr, u64 pci_addr, size_t size);
0073     void    (*unmap_addr)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0074                   phys_addr_t addr);
0075     int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0076                u8 interrupts);
0077     int (*get_msi)(struct pci_epc *epc, u8 func_no, u8 vfunc_no);
0078     int (*set_msix)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0079                 u16 interrupts, enum pci_barno, u32 offset);
0080     int (*get_msix)(struct pci_epc *epc, u8 func_no, u8 vfunc_no);
0081     int (*raise_irq)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0082                  enum pci_epc_irq_type type, u16 interrupt_num);
0083     int (*map_msi_irq)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0084                    phys_addr_t phys_addr, u8 interrupt_num,
0085                    u32 entry_size, u32 *msi_data,
0086                    u32 *msi_addr_offset);
0087     int (*start)(struct pci_epc *epc);
0088     void    (*stop)(struct pci_epc *epc);
0089     const struct pci_epc_features* (*get_features)(struct pci_epc *epc,
0090                                u8 func_no, u8 vfunc_no);
0091     struct module *owner;
0092 };
0093
0094 /**
0095  * struct pci_epc_mem_window - address window of the endpoint controller
0096  * @phys_base: physical base address of the PCI address window
0097  * @size: the size of the PCI address window
0098  * @page_size: size of each page
0099  */
0100 struct pci_epc_mem_window {
0101     phys_addr_t phys_base;
0102     size_t      size;
0103     size_t      page_size;
0104 };
0105
0106 /**
0107  * struct pci_epc_mem - address space of the endpoint controller
0108  * @window: address window of the endpoint controller
0109  * @bitmap: bitmap to manage the PCI address space
0110  * @pages: number of bits representing the address region
0111  * @lock: mutex to protect bitmap
0112  */
0113 struct pci_epc_mem {
0114     struct pci_epc_mem_window window;
0115     unsigned long   *bitmap;
0116     int     pages;
0117     /* mutex to protect against concurrent access for memory allocation*/
0118     struct mutex    lock;
0119 };
0120
0121 /**
0122  * struct pci_epc - represents the PCI EPC device
0123  * @dev: PCI EPC device
0124  * @pci_epf: list of endpoint functions present in this EPC device
0125  * @ops: function pointers for performing endpoint operations
0126  * @windows: array of address space of the endpoint controller
0127  * @mem: first window of the endpoint controller, which corresponds to
0128  *       default address space of the endpoint controller supporting
0129  *       single window.
0130  * @num_windows: number of windows supported by device
0131  * @max_functions: max number of functions that can be configured in this EPC
0132  * @max_vfs: Array indicating the maximum number of virtual functions that can
0133  *   be associated with each physical function
0134  * @group: configfs group representing the PCI EPC device
0135  * @lock: mutex to protect pci_epc ops
0136  * @function_num_map: bitmap to manage physical function number
0137  * @notifier: used to notify EPF of any EPC events (like linkup)
0138  */
0139 struct pci_epc {
0140     struct device           dev;
0141     struct list_head        pci_epf;
0142     const struct pci_epc_ops    *ops;
0143     struct pci_epc_mem      **windows;
0144     struct pci_epc_mem      *mem;
0145     unsigned int            num_windows;
0146     u8              max_functions;
0147     u8              *max_vfs;
0148     struct config_group     *group;
0149     /* mutex to protect against concurrent access of EP controller */
0150     struct mutex            lock;
0151     unsigned long           function_num_map;
0152     struct atomic_notifier_head notifier;
0153 };
0154
0155 /**
0156  * struct pci_epc_features - features supported by a EPC device per function
0157  * @linkup_notifier: indicate if the EPC device can notify EPF driver on link up
0158  * @core_init_notifier: indicate cores that can notify about their availability
0159  *          for initialization
0160  * @msi_capable: indicate if the endpoint function has MSI capability
0161  * @msix_capable: indicate if the endpoint function has MSI-X capability
0162  * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver
0163  * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs
0164  * @bar_fixed_size: Array specifying the size supported by each BAR
0165  * @align: alignment size required for BAR buffer allocation
0166  */
0167 struct pci_epc_features {
0168     unsigned int    linkup_notifier : 1;
0169     unsigned int    core_init_notifier : 1;
0170     unsigned int    msi_capable : 1;
0171     unsigned int    msix_capable : 1;
0172     u8  reserved_bar;
0173     u8  bar_fixed_64bit;
0174     u64 bar_fixed_size[PCI_STD_NUM_BARS];
0175     size_t  align;
0176 };
0177
0178 #define to_pci_epc(device) container_of((device), struct pci_epc, dev)
0179
0180 #define pci_epc_create(dev, ops)    \
0181         __pci_epc_create((dev), (ops), THIS_MODULE)
0182 #define devm_pci_epc_create(dev, ops)    \
0183         __devm_pci_epc_create((dev), (ops), THIS_MODULE)
0184
0185 static inline void epc_set_drvdata(struct pci_epc *epc, void *data)
0186 {
0187     dev_set_drvdata(&epc->dev, data);
0188 }
0189
0190 static inline void *epc_get_drvdata(struct pci_epc *epc)
0191 {
0192     return dev_get_drvdata(&epc->dev);
0193 }
0194
0195 static inline int
0196 pci_epc_register_notifier(struct pci_epc *epc, struct notifier_block *nb)
0197 {
0198     return atomic_notifier_chain_register(&epc->notifier, nb);
0199 }
0200
0201 struct pci_epc *
0202 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
0203               struct module *owner);
0204 struct pci_epc *
0205 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
0206          struct module *owner);
0207 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc);
0208 void pci_epc_destroy(struct pci_epc *epc);
0209 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf,
0210             enum pci_epc_interface_type type);
0211 void pci_epc_linkup(struct pci_epc *epc);
0212 void pci_epc_init_notify(struct pci_epc *epc);
0213 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf,
0214             enum pci_epc_interface_type type);
0215 int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0216              struct pci_epf_header *hdr);
0217 int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0218             struct pci_epf_bar *epf_bar);
0219 void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0220                struct pci_epf_bar *epf_bar);
0221 int pci_epc_map_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0222              phys_addr_t phys_addr,
0223              u64 pci_addr, size_t size);
0224 void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0225             phys_addr_t phys_addr);
0226 int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0227             u8 interrupts);
0228 int pci_epc_get_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no);
0229 int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0230              u16 interrupts, enum pci_barno, u32 offset);
0231 int pci_epc_get_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no);
0232 int pci_epc_map_msi_irq(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0233             phys_addr_t phys_addr, u8 interrupt_num,
0234             u32 entry_size, u32 *msi_data, u32 *msi_addr_offset);
0235 int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
0236               enum pci_epc_irq_type type, u16 interrupt_num);
0237 int pci_epc_start(struct pci_epc *epc);
0238 void pci_epc_stop(struct pci_epc *epc);
0239 const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
0240                             u8 func_no, u8 vfunc_no);
0241 enum pci_barno
0242 pci_epc_get_first_free_bar(const struct pci_epc_features *epc_features);
0243 enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features
0244                      *epc_features, enum pci_barno bar);
0245 struct pci_epc *pci_epc_get(const char *epc_name);
0246 void pci_epc_put(struct pci_epc *epc);
0247
0248 int pci_epc_mem_init(struct pci_epc *epc, phys_addr_t base,
0249              size_t size, size_t page_size);
0250 int pci_epc_multi_mem_init(struct pci_epc *epc,
0251                struct pci_epc_mem_window *window,
0252                unsigned int num_windows);
0253 void pci_epc_mem_exit(struct pci_epc *epc);
0254 void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
0255                      phys_addr_t *phys_addr, size_t size);
0256 void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
0257                void __iomem *virt_addr, size_t size);
0258 #endif /* __LINUX_PCI_EPC_H */