include/linux/omap-gpmc.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  *  OMAP GPMC (General Purpose Memory Controller) defines
0004  */
0005
0006 #include <linux/platform_data/gpmc-omap.h>
0007
0008 #define GPMC_CONFIG_WP      0x00000005
0009
0010 /* IRQ numbers in GPMC IRQ domain for legacy boot use */
0011 #define GPMC_IRQ_FIFOEVENTENABLE    0
0012 #define GPMC_IRQ_COUNT_EVENT        1
0013
0014 /**
0015  * gpmc_nand_ops - Interface between NAND and GPMC
0016  * @nand_write_buffer_empty: get the NAND write buffer empty status.
0017  */
0018 struct gpmc_nand_ops {
0019     bool (*nand_writebuffer_empty)(void);
0020 };
0021
0022 struct gpmc_nand_regs;
0023
0024 struct gpmc_onenand_info {
0025     bool sync_read;
0026     bool sync_write;
0027     int burst_len;
0028 };
0029
0030 #if IS_ENABLED(CONFIG_OMAP_GPMC)
0031 struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
0032                          int cs);
0033 /**
0034  * gpmc_omap_onenand_set_timings - set optimized sync timings.
0035  * @cs:      Chip Select Region
0036  * @freq:    Chip frequency
0037  * @latency: Burst latency cycle count
0038  * @info:    Structure describing parameters used
0039  *
0040  * Sets optimized timings for the @cs region based on @freq and @latency.
0041  * Updates the @info structure based on the GPMC settings.
0042  */
0043 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq,
0044                   int latency,
0045                   struct gpmc_onenand_info *info);
0046
0047 #else
0048 static inline struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
0049                                int cs)
0050 {
0051     return NULL;
0052 }
0053
0054 static inline
0055 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq,
0056                   int latency,
0057                   struct gpmc_onenand_info *info)
0058 {
0059     return -EINVAL;
0060 }
0061 #endif /* CONFIG_OMAP_GPMC */
0062
0063 extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
0064                  struct gpmc_settings *gpmc_s,
0065                  struct gpmc_device_timings *dev_t);
0066
0067 struct device_node;
0068
0069 extern int gpmc_get_client_irq(unsigned irq_config);
0070
0071 extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
0072
0073 extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
0074 extern int gpmc_calc_divider(unsigned int sync_clk);
0075 extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t,
0076                    const struct gpmc_settings *s);
0077 extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p);
0078 extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
0079 extern void gpmc_cs_free(int cs);
0080 extern int gpmc_configure(int cmd, int wval);
0081 extern void gpmc_read_settings_dt(struct device_node *np,
0082                   struct gpmc_settings *p);
0083
0084 struct gpmc_timings;
0085 struct omap_nand_platform_data;
0086 struct omap_onenand_platform_data;
0087
0088 #if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
0089 extern int gpmc_onenand_init(struct omap_onenand_platform_data *d);
0090 #else
0091 #define board_onenand_data  NULL
0092 static inline int gpmc_onenand_init(struct omap_onenand_platform_data *d)
0093 {
0094     return 0;
0095 }
0096 #endif