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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  linux/include/linux/mmc/host.h
0004  *
0005  *  Host driver specific definitions.
0006  */
0007 #ifndef LINUX_MMC_HOST_H
0008 #define LINUX_MMC_HOST_H
0009 
0010 #include <linux/sched.h>
0011 #include <linux/device.h>
0012 #include <linux/fault-inject.h>
0013 
0014 #include <linux/mmc/core.h>
0015 #include <linux/mmc/card.h>
0016 #include <linux/mmc/pm.h>
0017 #include <linux/dma-direction.h>
0018 #include <linux/blk-crypto-profile.h>
0019 
0020 struct mmc_ios {
0021     unsigned int    clock;          /* clock rate */
0022     unsigned short  vdd;
0023     unsigned int    power_delay_ms;     /* waiting for stable power */
0024 
0025 /* vdd stores the bit number of the selected voltage range from below. */
0026 
0027     unsigned char   bus_mode;       /* command output mode */
0028 
0029 #define MMC_BUSMODE_OPENDRAIN   1
0030 #define MMC_BUSMODE_PUSHPULL    2
0031 
0032     unsigned char   chip_select;        /* SPI chip select */
0033 
0034 #define MMC_CS_DONTCARE     0
0035 #define MMC_CS_HIGH     1
0036 #define MMC_CS_LOW      2
0037 
0038     unsigned char   power_mode;     /* power supply mode */
0039 
0040 #define MMC_POWER_OFF       0
0041 #define MMC_POWER_UP        1
0042 #define MMC_POWER_ON        2
0043 #define MMC_POWER_UNDEFINED 3
0044 
0045     unsigned char   bus_width;      /* data bus width */
0046 
0047 #define MMC_BUS_WIDTH_1     0
0048 #define MMC_BUS_WIDTH_4     2
0049 #define MMC_BUS_WIDTH_8     3
0050 
0051     unsigned char   timing;         /* timing specification used */
0052 
0053 #define MMC_TIMING_LEGACY   0
0054 #define MMC_TIMING_MMC_HS   1
0055 #define MMC_TIMING_SD_HS    2
0056 #define MMC_TIMING_UHS_SDR12    3
0057 #define MMC_TIMING_UHS_SDR25    4
0058 #define MMC_TIMING_UHS_SDR50    5
0059 #define MMC_TIMING_UHS_SDR104   6
0060 #define MMC_TIMING_UHS_DDR50    7
0061 #define MMC_TIMING_MMC_DDR52    8
0062 #define MMC_TIMING_MMC_HS200    9
0063 #define MMC_TIMING_MMC_HS400    10
0064 #define MMC_TIMING_SD_EXP   11
0065 #define MMC_TIMING_SD_EXP_1_2V  12
0066 
0067     unsigned char   signal_voltage;     /* signalling voltage (1.8V or 3.3V) */
0068 
0069 #define MMC_SIGNAL_VOLTAGE_330  0
0070 #define MMC_SIGNAL_VOLTAGE_180  1
0071 #define MMC_SIGNAL_VOLTAGE_120  2
0072 
0073     unsigned char   drv_type;       /* driver type (A, B, C, D) */
0074 
0075 #define MMC_SET_DRIVER_TYPE_B   0
0076 #define MMC_SET_DRIVER_TYPE_A   1
0077 #define MMC_SET_DRIVER_TYPE_C   2
0078 #define MMC_SET_DRIVER_TYPE_D   3
0079 
0080     bool enhanced_strobe;           /* hs400es selection */
0081 };
0082 
0083 struct mmc_clk_phase {
0084     bool valid;
0085     u16 in_deg;
0086     u16 out_deg;
0087 };
0088 
0089 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1)
0090 struct mmc_clk_phase_map {
0091     struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES];
0092 };
0093 
0094 struct mmc_host;
0095 
0096 enum mmc_err_stat {
0097     MMC_ERR_CMD_TIMEOUT,
0098     MMC_ERR_CMD_CRC,
0099     MMC_ERR_DAT_TIMEOUT,
0100     MMC_ERR_DAT_CRC,
0101     MMC_ERR_AUTO_CMD,
0102     MMC_ERR_ADMA,
0103     MMC_ERR_TUNING,
0104     MMC_ERR_CMDQ_RED,
0105     MMC_ERR_CMDQ_GCE,
0106     MMC_ERR_CMDQ_ICCE,
0107     MMC_ERR_REQ_TIMEOUT,
0108     MMC_ERR_CMDQ_REQ_TIMEOUT,
0109     MMC_ERR_ICE_CFG,
0110     MMC_ERR_CTRL_TIMEOUT,
0111     MMC_ERR_UNEXPECTED_IRQ,
0112     MMC_ERR_MAX,
0113 };
0114 
0115 struct mmc_host_ops {
0116     /*
0117      * It is optional for the host to implement pre_req and post_req in
0118      * order to support double buffering of requests (prepare one
0119      * request while another request is active).
0120      * pre_req() must always be followed by a post_req().
0121      * To undo a call made to pre_req(), call post_req() with
0122      * a nonzero err condition.
0123      */
0124     void    (*post_req)(struct mmc_host *host, struct mmc_request *req,
0125                 int err);
0126     void    (*pre_req)(struct mmc_host *host, struct mmc_request *req);
0127     void    (*request)(struct mmc_host *host, struct mmc_request *req);
0128     /* Submit one request to host in atomic context. */
0129     int (*request_atomic)(struct mmc_host *host,
0130                   struct mmc_request *req);
0131 
0132     /*
0133      * Avoid calling the next three functions too often or in a "fast
0134      * path", since underlaying controller might implement them in an
0135      * expensive and/or slow way. Also note that these functions might
0136      * sleep, so don't call them in the atomic contexts!
0137      */
0138 
0139     /*
0140      * Notes to the set_ios callback:
0141      * ios->clock might be 0. For some controllers, setting 0Hz
0142      * as any other frequency works. However, some controllers
0143      * explicitly need to disable the clock. Otherwise e.g. voltage
0144      * switching might fail because the SDCLK is not really quiet.
0145      */
0146     void    (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
0147 
0148     /*
0149      * Return values for the get_ro callback should be:
0150      *   0 for a read/write card
0151      *   1 for a read-only card
0152      *   -ENOSYS when not supported (equal to NULL callback)
0153      *   or a negative errno value when something bad happened
0154      */
0155     int (*get_ro)(struct mmc_host *host);
0156 
0157     /*
0158      * Return values for the get_cd callback should be:
0159      *   0 for a absent card
0160      *   1 for a present card
0161      *   -ENOSYS when not supported (equal to NULL callback)
0162      *   or a negative errno value when something bad happened
0163      */
0164     int (*get_cd)(struct mmc_host *host);
0165 
0166     void    (*enable_sdio_irq)(struct mmc_host *host, int enable);
0167     /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
0168     void    (*ack_sdio_irq)(struct mmc_host *host);
0169 
0170     /* optional callback for HC quirks */
0171     void    (*init_card)(struct mmc_host *host, struct mmc_card *card);
0172 
0173     int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
0174 
0175     /* Check if the card is pulling dat[0] low */
0176     int (*card_busy)(struct mmc_host *host);
0177 
0178     /* The tuning command opcode value is different for SD and eMMC cards */
0179     int (*execute_tuning)(struct mmc_host *host, u32 opcode);
0180 
0181     /* Prepare HS400 target operating frequency depending host driver */
0182     int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
0183 
0184     /* Execute HS400 tuning depending host driver */
0185     int (*execute_hs400_tuning)(struct mmc_host *host, struct mmc_card *card);
0186 
0187     /* Prepare switch to DDR during the HS400 init sequence */
0188     int (*hs400_prepare_ddr)(struct mmc_host *host);
0189 
0190     /* Prepare for switching from HS400 to HS200 */
0191     void    (*hs400_downgrade)(struct mmc_host *host);
0192 
0193     /* Complete selection of HS400 */
0194     void    (*hs400_complete)(struct mmc_host *host);
0195 
0196     /* Prepare enhanced strobe depending host driver */
0197     void    (*hs400_enhanced_strobe)(struct mmc_host *host,
0198                      struct mmc_ios *ios);
0199     int (*select_drive_strength)(struct mmc_card *card,
0200                      unsigned int max_dtr, int host_drv,
0201                      int card_drv, int *drv_type);
0202     /* Reset the eMMC card via RST_n */
0203     void    (*card_hw_reset)(struct mmc_host *host);
0204     void    (*card_event)(struct mmc_host *host);
0205 
0206     /*
0207      * Optional callback to support controllers with HW issues for multiple
0208      * I/O. Returns the number of supported blocks for the request.
0209      */
0210     int (*multi_io_quirk)(struct mmc_card *card,
0211                   unsigned int direction, int blk_size);
0212 
0213     /* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */
0214     int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
0215 };
0216 
0217 struct mmc_cqe_ops {
0218     /* Allocate resources, and make the CQE operational */
0219     int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
0220     /* Free resources, and make the CQE non-operational */
0221     void    (*cqe_disable)(struct mmc_host *host);
0222     /*
0223      * Issue a read, write or DCMD request to the CQE. Also deal with the
0224      * effect of ->cqe_off().
0225      */
0226     int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
0227     /* Free resources (e.g. DMA mapping) associated with the request */
0228     void    (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
0229     /*
0230      * Prepare the CQE and host controller to accept non-CQ commands. There
0231      * is no corresponding ->cqe_on(), instead ->cqe_request() is required
0232      * to deal with that.
0233      */
0234     void    (*cqe_off)(struct mmc_host *host);
0235     /*
0236      * Wait for all CQE tasks to complete. Return an error if recovery
0237      * becomes necessary.
0238      */
0239     int (*cqe_wait_for_idle)(struct mmc_host *host);
0240     /*
0241      * Notify CQE that a request has timed out. Return false if the request
0242      * completed or true if a timeout happened in which case indicate if
0243      * recovery is needed.
0244      */
0245     bool    (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
0246                    bool *recovery_needed);
0247     /*
0248      * Stop all CQE activity and prepare the CQE and host controller to
0249      * accept recovery commands.
0250      */
0251     void    (*cqe_recovery_start)(struct mmc_host *host);
0252     /*
0253      * Clear the queue and call mmc_cqe_request_done() on all requests.
0254      * Requests that errored will have the error set on the mmc_request
0255      * (data->error or cmd->error for DCMD).  Requests that did not error
0256      * will have zero data bytes transferred.
0257      */
0258     void    (*cqe_recovery_finish)(struct mmc_host *host);
0259 };
0260 
0261 struct mmc_async_req {
0262     /* active mmc request */
0263     struct mmc_request  *mrq;
0264     /*
0265      * Check error status of completed mmc request.
0266      * Returns 0 if success otherwise non zero.
0267      */
0268     enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
0269 };
0270 
0271 /**
0272  * struct mmc_slot - MMC slot functions
0273  *
0274  * @cd_irq:     MMC/SD-card slot hotplug detection IRQ or -EINVAL
0275  * @handler_priv:   MMC/SD-card slot context
0276  *
0277  * Some MMC/SD host controllers implement slot-functions like card and
0278  * write-protect detection natively. However, a large number of controllers
0279  * leave these functions to the CPU. This struct provides a hook to attach
0280  * such slot-function drivers.
0281  */
0282 struct mmc_slot {
0283     int cd_irq;
0284     bool cd_wake_enabled;
0285     void *handler_priv;
0286 };
0287 
0288 /**
0289  * mmc_context_info - synchronization details for mmc context
0290  * @is_done_rcv     wake up reason was done request
0291  * @is_new_req      wake up reason was new request
0292  * @is_waiting_last_req mmc context waiting for single running request
0293  * @wait        wait queue
0294  */
0295 struct mmc_context_info {
0296     bool            is_done_rcv;
0297     bool            is_new_req;
0298     bool            is_waiting_last_req;
0299     wait_queue_head_t   wait;
0300 };
0301 
0302 struct regulator;
0303 struct mmc_pwrseq;
0304 
0305 struct mmc_supply {
0306     struct regulator *vmmc;     /* Card power supply */
0307     struct regulator *vqmmc;    /* Optional Vccq supply */
0308 };
0309 
0310 struct mmc_ctx {
0311     struct task_struct *task;
0312 };
0313 
0314 struct mmc_host {
0315     struct device       *parent;
0316     struct device       class_dev;
0317     int         index;
0318     const struct mmc_host_ops *ops;
0319     struct mmc_pwrseq   *pwrseq;
0320     unsigned int        f_min;
0321     unsigned int        f_max;
0322     unsigned int        f_init;
0323     u32         ocr_avail;
0324     u32         ocr_avail_sdio; /* SDIO-specific OCR */
0325     u32         ocr_avail_sd;   /* SD-specific OCR */
0326     u32         ocr_avail_mmc;  /* MMC-specific OCR */
0327     struct wakeup_source    *ws;        /* Enable consume of uevents */
0328     u32         max_current_330;
0329     u32         max_current_300;
0330     u32         max_current_180;
0331 
0332 #define MMC_VDD_165_195     0x00000080  /* VDD voltage 1.65 - 1.95 */
0333 #define MMC_VDD_20_21       0x00000100  /* VDD voltage 2.0 ~ 2.1 */
0334 #define MMC_VDD_21_22       0x00000200  /* VDD voltage 2.1 ~ 2.2 */
0335 #define MMC_VDD_22_23       0x00000400  /* VDD voltage 2.2 ~ 2.3 */
0336 #define MMC_VDD_23_24       0x00000800  /* VDD voltage 2.3 ~ 2.4 */
0337 #define MMC_VDD_24_25       0x00001000  /* VDD voltage 2.4 ~ 2.5 */
0338 #define MMC_VDD_25_26       0x00002000  /* VDD voltage 2.5 ~ 2.6 */
0339 #define MMC_VDD_26_27       0x00004000  /* VDD voltage 2.6 ~ 2.7 */
0340 #define MMC_VDD_27_28       0x00008000  /* VDD voltage 2.7 ~ 2.8 */
0341 #define MMC_VDD_28_29       0x00010000  /* VDD voltage 2.8 ~ 2.9 */
0342 #define MMC_VDD_29_30       0x00020000  /* VDD voltage 2.9 ~ 3.0 */
0343 #define MMC_VDD_30_31       0x00040000  /* VDD voltage 3.0 ~ 3.1 */
0344 #define MMC_VDD_31_32       0x00080000  /* VDD voltage 3.1 ~ 3.2 */
0345 #define MMC_VDD_32_33       0x00100000  /* VDD voltage 3.2 ~ 3.3 */
0346 #define MMC_VDD_33_34       0x00200000  /* VDD voltage 3.3 ~ 3.4 */
0347 #define MMC_VDD_34_35       0x00400000  /* VDD voltage 3.4 ~ 3.5 */
0348 #define MMC_VDD_35_36       0x00800000  /* VDD voltage 3.5 ~ 3.6 */
0349 
0350     u32         caps;       /* Host capabilities */
0351 
0352 #define MMC_CAP_4_BIT_DATA  (1 << 0)    /* Can the host do 4 bit transfers */
0353 #define MMC_CAP_MMC_HIGHSPEED   (1 << 1)    /* Can do MMC high-speed timing */
0354 #define MMC_CAP_SD_HIGHSPEED    (1 << 2)    /* Can do SD high-speed timing */
0355 #define MMC_CAP_SDIO_IRQ    (1 << 3)    /* Can signal pending SDIO IRQs */
0356 #define MMC_CAP_SPI     (1 << 4)    /* Talks only SPI protocols */
0357 #define MMC_CAP_NEEDS_POLL  (1 << 5)    /* Needs polling for card-detection */
0358 #define MMC_CAP_8_BIT_DATA  (1 << 6)    /* Can the host do 8 bit transfers */
0359 #define MMC_CAP_AGGRESSIVE_PM   (1 << 7)    /* Suspend (e)MMC/SD at idle  */
0360 #define MMC_CAP_NONREMOVABLE    (1 << 8)    /* Nonremovable e.g. eMMC */
0361 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)    /* Waits while card is busy */
0362 #define MMC_CAP_3_3V_DDR    (1 << 11)   /* Host supports eMMC DDR 3.3V */
0363 #define MMC_CAP_1_8V_DDR    (1 << 12)   /* Host supports eMMC DDR 1.8V */
0364 #define MMC_CAP_1_2V_DDR    (1 << 13)   /* Host supports eMMC DDR 1.2V */
0365 #define MMC_CAP_DDR     (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
0366                  MMC_CAP_1_2V_DDR)
0367 #define MMC_CAP_POWER_OFF_CARD  (1 << 14)   /* Can power off after boot */
0368 #define MMC_CAP_BUS_WIDTH_TEST  (1 << 15)   /* CMD14/CMD19 bus width ok */
0369 #define MMC_CAP_UHS_SDR12   (1 << 16)   /* Host supports UHS SDR12 mode */
0370 #define MMC_CAP_UHS_SDR25   (1 << 17)   /* Host supports UHS SDR25 mode */
0371 #define MMC_CAP_UHS_SDR50   (1 << 18)   /* Host supports UHS SDR50 mode */
0372 #define MMC_CAP_UHS_SDR104  (1 << 19)   /* Host supports UHS SDR104 mode */
0373 #define MMC_CAP_UHS_DDR50   (1 << 20)   /* Host supports UHS DDR50 mode */
0374 #define MMC_CAP_UHS     (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
0375                  MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
0376                  MMC_CAP_UHS_DDR50)
0377 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21)   /* Synced runtime PM suspends. */
0378 #define MMC_CAP_NEED_RSP_BUSY   (1 << 22)   /* Commands with R1B can't use R1. */
0379 #define MMC_CAP_DRIVER_TYPE_A   (1 << 23)   /* Host supports Driver Type A */
0380 #define MMC_CAP_DRIVER_TYPE_C   (1 << 24)   /* Host supports Driver Type C */
0381 #define MMC_CAP_DRIVER_TYPE_D   (1 << 25)   /* Host supports Driver Type D */
0382 #define MMC_CAP_DONE_COMPLETE   (1 << 27)   /* RW reqs can be completed within mmc_request_done() */
0383 #define MMC_CAP_CD_WAKE     (1 << 28)   /* Enable card detect wake */
0384 #define MMC_CAP_CMD_DURING_TFR  (1 << 29)   /* Commands during data transfer */
0385 #define MMC_CAP_CMD23       (1 << 30)   /* CMD23 supported. */
0386 #define MMC_CAP_HW_RESET    (1 << 31)   /* Reset the eMMC card via RST_n */
0387 
0388     u32         caps2;      /* More host capabilities */
0389 
0390 #define MMC_CAP2_BOOTPART_NOACC (1 << 0)    /* Boot partition no access */
0391 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)    /* Can do full power cycle */
0392 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */
0393 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5)        /* can support */
0394 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6)        /* can support */
0395 #define MMC_CAP2_HS200      (MMC_CAP2_HS200_1_8V_SDR | \
0396                  MMC_CAP2_HS200_1_2V_SDR)
0397 #define MMC_CAP2_SD_EXP     (1 << 7)    /* SD express via PCIe */
0398 #define MMC_CAP2_SD_EXP_1_2V    (1 << 8)    /* SD express 1.2V */
0399 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)   /* Card-detect signal active high */
0400 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)   /* Write-protect signal active high */
0401 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
0402 #define MMC_CAP2_HS400_1_8V (1 << 15)   /* Can support HS400 1.8V */
0403 #define MMC_CAP2_HS400_1_2V (1 << 16)   /* Can support HS400 1.2V */
0404 #define MMC_CAP2_HS400      (MMC_CAP2_HS400_1_8V | \
0405                  MMC_CAP2_HS400_1_2V)
0406 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
0407 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
0408 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
0409 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
0410 #define MMC_CAP2_NO_SDIO    (1 << 19)   /* Do not send SDIO commands during initialization */
0411 #define MMC_CAP2_HS400_ES   (1 << 20)   /* Host supports enhanced strobe */
0412 #define MMC_CAP2_NO_SD      (1 << 21)   /* Do not send SD commands during initialization */
0413 #define MMC_CAP2_NO_MMC     (1 << 22)   /* Do not send (e)MMC commands during initialization */
0414 #define MMC_CAP2_CQE        (1 << 23)   /* Has eMMC command queue engine */
0415 #define MMC_CAP2_CQE_DCMD   (1 << 24)   /* CQE can issue a direct command */
0416 #define MMC_CAP2_AVOID_3_3V (1 << 25)   /* Host must negotiate down from 3.3V */
0417 #define MMC_CAP2_MERGE_CAPABLE  (1 << 26)   /* Host can merge a segment over the segment size */
0418 #ifdef CONFIG_MMC_CRYPTO
0419 #define MMC_CAP2_CRYPTO     (1 << 27)   /* Host supports inline encryption */
0420 #else
0421 #define MMC_CAP2_CRYPTO     0
0422 #endif
0423 #define MMC_CAP2_ALT_GPT_TEGRA  (1 << 28)   /* Host with eMMC that has GPT entry at a non-standard location */
0424 
0425     int         fixed_drv_type; /* fixed driver type for non-removable media */
0426 
0427     mmc_pm_flag_t       pm_caps;    /* supported pm features */
0428 
0429     /* host specific block data */
0430     unsigned int        max_seg_size;   /* see blk_queue_max_segment_size */
0431     unsigned short      max_segs;   /* see blk_queue_max_segments */
0432     unsigned short      unused;
0433     unsigned int        max_req_size;   /* maximum number of bytes in one req */
0434     unsigned int        max_blk_size;   /* maximum size of one mmc block */
0435     unsigned int        max_blk_count;  /* maximum number of blocks in one req */
0436     unsigned int        max_busy_timeout; /* max busy timeout in ms */
0437 
0438     /* private data */
0439     spinlock_t      lock;       /* lock for claim and bus ops */
0440 
0441     struct mmc_ios      ios;        /* current io bus settings */
0442 
0443     /* group bitfields together to minimize padding */
0444     unsigned int        use_spi_crc:1;
0445     unsigned int        claimed:1;  /* host exclusively claimed */
0446     unsigned int        doing_init_tune:1; /* initial tuning in progress */
0447     unsigned int        can_retune:1;   /* re-tuning can be used */
0448     unsigned int        doing_retune:1; /* re-tuning in progress */
0449     unsigned int        retune_now:1;   /* do re-tuning at next req */
0450     unsigned int        retune_paused:1; /* re-tuning is temporarily disabled */
0451     unsigned int        retune_crc_disable:1; /* don't trigger retune upon crc */
0452     unsigned int        can_dma_map_merge:1; /* merging can be used */
0453 
0454     int         rescan_disable; /* disable card detection */
0455     int         rescan_entered; /* used with nonremovable devices */
0456 
0457     int         need_retune;    /* re-tuning is needed */
0458     int         hold_retune;    /* hold off re-tuning */
0459     unsigned int        retune_period;  /* re-tuning period in secs */
0460     struct timer_list   retune_timer;   /* for periodic re-tuning */
0461 
0462     bool            trigger_card_event; /* card_event necessary */
0463 
0464     struct mmc_card     *card;      /* device attached to this host */
0465 
0466     wait_queue_head_t   wq;
0467     struct mmc_ctx      *claimer;   /* context that has host claimed */
0468     int         claim_cnt;  /* "claim" nesting count */
0469     struct mmc_ctx      default_ctx;    /* default context */
0470 
0471     struct delayed_work detect;
0472     int         detect_change;  /* card detect flag */
0473     struct mmc_slot     slot;
0474 
0475     const struct mmc_bus_ops *bus_ops;  /* current bus driver */
0476 
0477     unsigned int        sdio_irqs;
0478     struct task_struct  *sdio_irq_thread;
0479     struct delayed_work sdio_irq_work;
0480     bool            sdio_irq_pending;
0481     atomic_t        sdio_irq_thread_abort;
0482 
0483     mmc_pm_flag_t       pm_flags;   /* requested pm features */
0484 
0485     struct led_trigger  *led;       /* activity led */
0486 
0487 #ifdef CONFIG_REGULATOR
0488     bool            regulator_enabled; /* regulator state */
0489 #endif
0490     struct mmc_supply   supply;
0491 
0492     struct dentry       *debugfs_root;
0493 
0494     /* Ongoing data transfer that allows commands during transfer */
0495     struct mmc_request  *ongoing_mrq;
0496 
0497 #ifdef CONFIG_FAIL_MMC_REQUEST
0498     struct fault_attr   fail_mmc_request;
0499 #endif
0500 
0501     unsigned int        actual_clock;   /* Actual HC clock rate */
0502 
0503     unsigned int        slotno; /* used for sdio acpi binding */
0504 
0505     int         dsr_req;    /* DSR value is valid */
0506     u32         dsr;    /* optional driver stage (DSR) value */
0507 
0508     /* Command Queue Engine (CQE) support */
0509     const struct mmc_cqe_ops *cqe_ops;
0510     void            *cqe_private;
0511     int         cqe_qdepth;
0512     bool            cqe_enabled;
0513     bool            cqe_on;
0514 
0515     /* Inline encryption support */
0516 #ifdef CONFIG_MMC_CRYPTO
0517     struct blk_crypto_profile crypto_profile;
0518 #endif
0519 
0520     /* Host Software Queue support */
0521     bool            hsq_enabled;
0522 
0523     u32         err_stats[MMC_ERR_MAX];
0524     unsigned long       private[] ____cacheline_aligned;
0525 };
0526 
0527 struct device_node;
0528 
0529 struct mmc_host *mmc_alloc_host(int extra, struct device *);
0530 int mmc_add_host(struct mmc_host *);
0531 void mmc_remove_host(struct mmc_host *);
0532 void mmc_free_host(struct mmc_host *);
0533 void mmc_of_parse_clk_phase(struct mmc_host *host,
0534                 struct mmc_clk_phase_map *map);
0535 int mmc_of_parse(struct mmc_host *host);
0536 int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask);
0537 
0538 static inline void *mmc_priv(struct mmc_host *host)
0539 {
0540     return (void *)host->private;
0541 }
0542 
0543 static inline struct mmc_host *mmc_from_priv(void *priv)
0544 {
0545     return container_of(priv, struct mmc_host, private);
0546 }
0547 
0548 #define mmc_host_is_spi(host)   ((host)->caps & MMC_CAP_SPI)
0549 
0550 #define mmc_dev(x)  ((x)->parent)
0551 #define mmc_classdev(x) (&(x)->class_dev)
0552 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
0553 
0554 void mmc_detect_change(struct mmc_host *, unsigned long delay);
0555 void mmc_request_done(struct mmc_host *, struct mmc_request *);
0556 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
0557 
0558 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
0559 
0560 /*
0561  * May be called from host driver's system/runtime suspend/resume callbacks,
0562  * to know if SDIO IRQs has been claimed.
0563  */
0564 static inline bool sdio_irq_claimed(struct mmc_host *host)
0565 {
0566     return host->sdio_irqs > 0;
0567 }
0568 
0569 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
0570 {
0571     host->ops->enable_sdio_irq(host, 0);
0572     host->sdio_irq_pending = true;
0573     if (host->sdio_irq_thread)
0574         wake_up_process(host->sdio_irq_thread);
0575 }
0576 
0577 void sdio_signal_irq(struct mmc_host *host);
0578 
0579 #ifdef CONFIG_REGULATOR
0580 int mmc_regulator_set_ocr(struct mmc_host *mmc,
0581             struct regulator *supply,
0582             unsigned short vdd_bit);
0583 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
0584 #else
0585 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
0586                  struct regulator *supply,
0587                  unsigned short vdd_bit)
0588 {
0589     return 0;
0590 }
0591 
0592 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
0593                       struct mmc_ios *ios)
0594 {
0595     return -EINVAL;
0596 }
0597 #endif
0598 
0599 int mmc_regulator_get_supply(struct mmc_host *mmc);
0600 
0601 static inline int mmc_card_is_removable(struct mmc_host *host)
0602 {
0603     return !(host->caps & MMC_CAP_NONREMOVABLE);
0604 }
0605 
0606 static inline int mmc_card_keep_power(struct mmc_host *host)
0607 {
0608     return host->pm_flags & MMC_PM_KEEP_POWER;
0609 }
0610 
0611 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
0612 {
0613     return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
0614 }
0615 
0616 /* TODO: Move to private header */
0617 static inline int mmc_card_hs(struct mmc_card *card)
0618 {
0619     return card->host->ios.timing == MMC_TIMING_SD_HS ||
0620         card->host->ios.timing == MMC_TIMING_MMC_HS;
0621 }
0622 
0623 /* TODO: Move to private header */
0624 static inline int mmc_card_uhs(struct mmc_card *card)
0625 {
0626     return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
0627         card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
0628 }
0629 
0630 void mmc_retune_timer_stop(struct mmc_host *host);
0631 
0632 static inline void mmc_retune_needed(struct mmc_host *host)
0633 {
0634     if (host->can_retune)
0635         host->need_retune = 1;
0636 }
0637 
0638 static inline bool mmc_can_retune(struct mmc_host *host)
0639 {
0640     return host->can_retune == 1;
0641 }
0642 
0643 static inline bool mmc_doing_retune(struct mmc_host *host)
0644 {
0645     return host->doing_retune == 1;
0646 }
0647 
0648 static inline bool mmc_doing_tune(struct mmc_host *host)
0649 {
0650     return host->doing_retune == 1 || host->doing_init_tune == 1;
0651 }
0652 
0653 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
0654 {
0655     return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
0656 }
0657 
0658 static inline void mmc_debugfs_err_stats_inc(struct mmc_host *host,
0659                          enum mmc_err_stat stat)
0660 {
0661     host->err_stats[stat] += 1;
0662 }
0663 
0664 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
0665 int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode);
0666 int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
0667 
0668 #endif /* LINUX_MMC_HOST_H */
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