linux/mlx4/cmd.h

0001 /*
0002  * Copyright (c) 2006 Cisco Systems, Inc.  All rights reserved.
0003  *
0004  * This software is available to you under a choice of one of two
0005  * licenses.  You may choose to be licensed under the terms of the GNU
0006  * General Public License (GPL) Version 2, available from the file
0007  * COPYING in the main directory of this source tree, or the
0008  * OpenIB.org BSD license below:
0009  *
0010  *     Redistribution and use in source and binary forms, with or
0011  *     without modification, are permitted provided that the following
0012  *     conditions are met:
0013  *
0014  *      - Redistributions of source code must retain the above
0015  *        copyright notice, this list of conditions and the following
0016  *        disclaimer.
0017  *
0018  *      - Redistributions in binary form must reproduce the above
0019  *        copyright notice, this list of conditions and the following
0020  *        disclaimer in the documentation and/or other materials
0021  *        provided with the distribution.
0022  *
0023  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0024  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0025  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0026  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0027  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0028  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0029  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0030  * SOFTWARE.
0031  */
0032
0033 #ifndef MLX4_CMD_H
0034 #define MLX4_CMD_H
0035
0036 #include <linux/dma-mapping.h>
0037 #include <linux/if_link.h>
0038 #include <linux/mlx4/device.h>
0039 #include <linux/netdevice.h>
0040
0041 enum {
0042     /* initialization and general commands */
0043     MLX4_CMD_SYS_EN      = 0x1,
0044     MLX4_CMD_SYS_DIS     = 0x2,
0045     MLX4_CMD_MAP_FA      = 0xfff,
0046     MLX4_CMD_UNMAP_FA    = 0xffe,
0047     MLX4_CMD_RUN_FW      = 0xff6,
0048     MLX4_CMD_MOD_STAT_CFG    = 0x34,
0049     MLX4_CMD_QUERY_DEV_CAP   = 0x3,
0050     MLX4_CMD_QUERY_FW    = 0x4,
0051     MLX4_CMD_ENABLE_LAM  = 0xff8,
0052     MLX4_CMD_DISABLE_LAM     = 0xff7,
0053     MLX4_CMD_QUERY_DDR   = 0x5,
0054     MLX4_CMD_QUERY_ADAPTER   = 0x6,
0055     MLX4_CMD_INIT_HCA    = 0x7,
0056     MLX4_CMD_CLOSE_HCA   = 0x8,
0057     MLX4_CMD_INIT_PORT   = 0x9,
0058     MLX4_CMD_CLOSE_PORT  = 0xa,
0059     MLX4_CMD_QUERY_HCA   = 0xb,
0060     MLX4_CMD_QUERY_PORT  = 0x43,
0061     MLX4_CMD_SENSE_PORT  = 0x4d,
0062     MLX4_CMD_HW_HEALTH_CHECK = 0x50,
0063     MLX4_CMD_SET_PORT    = 0xc,
0064     MLX4_CMD_SET_NODE    = 0x5a,
0065     MLX4_CMD_QUERY_FUNC  = 0x56,
0066     MLX4_CMD_ACCESS_DDR  = 0x2e,
0067     MLX4_CMD_MAP_ICM     = 0xffa,
0068     MLX4_CMD_UNMAP_ICM   = 0xff9,
0069     MLX4_CMD_MAP_ICM_AUX     = 0xffc,
0070     MLX4_CMD_UNMAP_ICM_AUX   = 0xffb,
0071     MLX4_CMD_SET_ICM_SIZE    = 0xffd,
0072     MLX4_CMD_ACCESS_REG  = 0x3b,
0073     MLX4_CMD_ALLOCATE_VPP    = 0x80,
0074     MLX4_CMD_SET_VPORT_QOS   = 0x81,
0075
0076     /*master notify fw on finish for slave's flr*/
0077     MLX4_CMD_INFORM_FLR_DONE = 0x5b,
0078     MLX4_CMD_VIRT_PORT_MAP   = 0x5c,
0079     MLX4_CMD_GET_OP_REQ      = 0x59,
0080
0081     /* TPT commands */
0082     MLX4_CMD_SW2HW_MPT   = 0xd,
0083     MLX4_CMD_QUERY_MPT   = 0xe,
0084     MLX4_CMD_HW2SW_MPT   = 0xf,
0085     MLX4_CMD_READ_MTT    = 0x10,
0086     MLX4_CMD_WRITE_MTT   = 0x11,
0087     MLX4_CMD_SYNC_TPT    = 0x2f,
0088
0089     /* EQ commands */
0090     MLX4_CMD_MAP_EQ      = 0x12,
0091     MLX4_CMD_SW2HW_EQ    = 0x13,
0092     MLX4_CMD_HW2SW_EQ    = 0x14,
0093     MLX4_CMD_QUERY_EQ    = 0x15,
0094
0095     /* CQ commands */
0096     MLX4_CMD_SW2HW_CQ    = 0x16,
0097     MLX4_CMD_HW2SW_CQ    = 0x17,
0098     MLX4_CMD_QUERY_CQ    = 0x18,
0099     MLX4_CMD_MODIFY_CQ   = 0x2c,
0100
0101     /* SRQ commands */
0102     MLX4_CMD_SW2HW_SRQ   = 0x35,
0103     MLX4_CMD_HW2SW_SRQ   = 0x36,
0104     MLX4_CMD_QUERY_SRQ   = 0x37,
0105     MLX4_CMD_ARM_SRQ     = 0x40,
0106
0107     /* QP/EE commands */
0108     MLX4_CMD_RST2INIT_QP     = 0x19,
0109     MLX4_CMD_INIT2RTR_QP     = 0x1a,
0110     MLX4_CMD_RTR2RTS_QP  = 0x1b,
0111     MLX4_CMD_RTS2RTS_QP  = 0x1c,
0112     MLX4_CMD_SQERR2RTS_QP    = 0x1d,
0113     MLX4_CMD_2ERR_QP     = 0x1e,
0114     MLX4_CMD_RTS2SQD_QP  = 0x1f,
0115     MLX4_CMD_SQD2SQD_QP  = 0x38,
0116     MLX4_CMD_SQD2RTS_QP  = 0x20,
0117     MLX4_CMD_2RST_QP     = 0x21,
0118     MLX4_CMD_QUERY_QP    = 0x22,
0119     MLX4_CMD_INIT2INIT_QP    = 0x2d,
0120     MLX4_CMD_SUSPEND_QP  = 0x32,
0121     MLX4_CMD_UNSUSPEND_QP    = 0x33,
0122     MLX4_CMD_UPDATE_QP   = 0x61,
0123     /* special QP and management commands */
0124     MLX4_CMD_CONF_SPECIAL_QP = 0x23,
0125     MLX4_CMD_MAD_IFC     = 0x24,
0126     MLX4_CMD_MAD_DEMUX   = 0x203,
0127
0128     /* multicast commands */
0129     MLX4_CMD_READ_MCG    = 0x25,
0130     MLX4_CMD_WRITE_MCG   = 0x26,
0131     MLX4_CMD_MGID_HASH   = 0x27,
0132
0133     /* miscellaneous commands */
0134     MLX4_CMD_DIAG_RPRT   = 0x30,
0135     MLX4_CMD_NOP         = 0x31,
0136     MLX4_CMD_CONFIG_DEV  = 0x3a,
0137     MLX4_CMD_ACCESS_MEM  = 0x2e,
0138     MLX4_CMD_SET_VEP     = 0x52,
0139
0140     /* Ethernet specific commands */
0141     MLX4_CMD_SET_VLAN_FLTR   = 0x47,
0142     MLX4_CMD_SET_MCAST_FLTR  = 0x48,
0143     MLX4_CMD_DUMP_ETH_STATS  = 0x49,
0144
0145     /* Communication channel commands */
0146     MLX4_CMD_ARM_COMM_CHANNEL = 0x57,
0147     MLX4_CMD_GEN_EQE     = 0x58,
0148
0149     /* virtual commands */
0150     MLX4_CMD_ALLOC_RES   = 0xf00,
0151     MLX4_CMD_FREE_RES    = 0xf01,
0152     MLX4_CMD_MCAST_ATTACH    = 0xf05,
0153     MLX4_CMD_UCAST_ATTACH    = 0xf06,
0154     MLX4_CMD_PROMISC         = 0xf08,
0155     MLX4_CMD_QUERY_FUNC_CAP  = 0xf0a,
0156     MLX4_CMD_QP_ATTACH   = 0xf0b,
0157
0158     /* debug commands */
0159     MLX4_CMD_QUERY_DEBUG_MSG = 0x2a,
0160     MLX4_CMD_SET_DEBUG_MSG   = 0x2b,
0161
0162     /* statistics commands */
0163     MLX4_CMD_QUERY_IF_STAT   = 0X54,
0164     MLX4_CMD_SET_IF_STAT     = 0X55,
0165
0166     /* register/delete flow steering network rules */
0167     MLX4_QP_FLOW_STEERING_ATTACH = 0x65,
0168     MLX4_QP_FLOW_STEERING_DETACH = 0x66,
0169     MLX4_FLOW_STEERING_IB_UC_QP_RANGE = 0x64,
0170
0171     /* Update and read QCN parameters */
0172     MLX4_CMD_CONGESTION_CTRL_OPCODE = 0x68,
0173 };
0174
0175 enum {
0176     MLX4_CMD_TIME_CLASS_A   = 60000,
0177     MLX4_CMD_TIME_CLASS_B   = 60000,
0178     MLX4_CMD_TIME_CLASS_C   = 60000,
0179 };
0180
0181 enum {
0182     /* virtual to physical port mapping opcode modifiers */
0183     MLX4_GET_PORT_VIRT2PHY = 0x0,
0184     MLX4_SET_PORT_VIRT2PHY = 0x1,
0185 };
0186
0187 enum {
0188     MLX4_MAILBOX_SIZE   = 4096,
0189     MLX4_ACCESS_MEM_ALIGN   = 256,
0190 };
0191
0192 enum {
0193     /* Set port opcode modifiers */
0194     MLX4_SET_PORT_IB_OPCODE     = 0x0,
0195     MLX4_SET_PORT_ETH_OPCODE    = 0x1,
0196     MLX4_SET_PORT_BEACON_OPCODE = 0x4,
0197 };
0198
0199 enum {
0200     /* Set port Ethernet input modifiers */
0201     MLX4_SET_PORT_GENERAL   = 0x0,
0202     MLX4_SET_PORT_RQP_CALC  = 0x1,
0203     MLX4_SET_PORT_MAC_TABLE = 0x2,
0204     MLX4_SET_PORT_VLAN_TABLE = 0x3,
0205     MLX4_SET_PORT_PRIO_MAP  = 0x4,
0206     MLX4_SET_PORT_GID_TABLE = 0x5,
0207     MLX4_SET_PORT_PRIO2TC   = 0x8,
0208     MLX4_SET_PORT_SCHEDULER = 0x9,
0209     MLX4_SET_PORT_VXLAN = 0xB,
0210     MLX4_SET_PORT_ROCE_ADDR = 0xD
0211 };
0212
0213 enum {
0214     MLX4_CMD_MAD_DEMUX_CONFIG   = 0,
0215     MLX4_CMD_MAD_DEMUX_QUERY_STATE  = 1,
0216     MLX4_CMD_MAD_DEMUX_QUERY_RESTR  = 2, /* Query mad demux restrictions */
0217 };
0218
0219 enum {
0220     MLX4_CMD_WRAPPED,
0221     MLX4_CMD_NATIVE
0222 };
0223
0224 /*
0225  * MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP -
0226  * Receive checksum value is reported in CQE also for non TCP/UDP packets.
0227  *
0228  * MLX4_RX_CSUM_MODE_L4 -
0229  * L4_CSUM bit in CQE, which indicates whether or not L4 checksum
0230  * was validated correctly, is supported.
0231  *
0232  * MLX4_RX_CSUM_MODE_IP_OK_IP_NON_TCP_UDP -
0233  * IP_OK CQE's field is supported also for non TCP/UDP IP packets.
0234  *
0235  * MLX4_RX_CSUM_MODE_MULTI_VLAN -
0236  * Receive Checksum offload is supported for packets with more than 2 vlan headers.
0237  */
0238 enum mlx4_rx_csum_mode {
0239     MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP       = 1UL << 0,
0240     MLX4_RX_CSUM_MODE_L4                = 1UL << 1,
0241     MLX4_RX_CSUM_MODE_IP_OK_IP_NON_TCP_UDP      = 1UL << 2,
0242     MLX4_RX_CSUM_MODE_MULTI_VLAN            = 1UL << 3
0243 };
0244
0245 struct mlx4_config_dev_params {
0246     u16 vxlan_udp_dport;
0247     u8  rx_csum_flags_port_1;
0248     u8  rx_csum_flags_port_2;
0249 };
0250
0251 enum mlx4_en_congestion_control_algorithm {
0252     MLX4_CTRL_ALGO_802_1_QAU_REACTION_POINT = 0,
0253 };
0254
0255 enum mlx4_en_congestion_control_opmod {
0256     MLX4_CONGESTION_CONTROL_GET_PARAMS,
0257     MLX4_CONGESTION_CONTROL_GET_STATISTICS,
0258     MLX4_CONGESTION_CONTROL_SET_PARAMS = 4,
0259 };
0260
0261 struct mlx4_dev;
0262
0263 struct mlx4_cmd_mailbox {
0264     void               *buf;
0265     dma_addr_t      dma;
0266 };
0267
0268 int __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
0269            int out_is_imm, u32 in_modifier, u8 op_modifier,
0270            u16 op, unsigned long timeout, int native);
0271
0272 /* Invoke a command with no output parameter */
0273 static inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier,
0274                u8 op_modifier, u16 op, unsigned long timeout,
0275                int native)
0276 {
0277     return __mlx4_cmd(dev, in_param, NULL, 0, in_modifier,
0278               op_modifier, op, timeout, native);
0279 }
0280
0281 /* Invoke a command with an output mailbox */
0282 static inline int mlx4_cmd_box(struct mlx4_dev *dev, u64 in_param, u64 out_param,
0283                    u32 in_modifier, u8 op_modifier, u16 op,
0284                    unsigned long timeout, int native)
0285 {
0286     return __mlx4_cmd(dev, in_param, &out_param, 0, in_modifier,
0287               op_modifier, op, timeout, native);
0288 }
0289
0290 /*
0291  * Invoke a command with an immediate output parameter (and copy the
0292  * output into the caller's out_param pointer after the command
0293  * executes).
0294  */
0295 static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
0296                    u32 in_modifier, u8 op_modifier, u16 op,
0297                    unsigned long timeout, int native)
0298 {
0299     return __mlx4_cmd(dev, in_param, out_param, 1, in_modifier,
0300               op_modifier, op, timeout, native);
0301 }
0302
0303 struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev);
0304 void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox);
0305
0306 int mlx4_get_counter_stats(struct mlx4_dev *dev, int counter_index,
0307                struct mlx4_counter *counter_stats, int reset);
0308 int mlx4_get_vf_stats(struct mlx4_dev *dev, int port, int vf_idx,
0309               struct ifla_vf_stats *vf_stats);
0310 u32 mlx4_comm_get_version(void);
0311 int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u8 *mac);
0312 int mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan,
0313              u8 qos, __be16 proto);
0314 int mlx4_set_vf_rate(struct mlx4_dev *dev, int port, int vf, int min_tx_rate,
0315              int max_tx_rate);
0316 int mlx4_set_vf_spoofchk(struct mlx4_dev *dev, int port, int vf, bool setting);
0317 int mlx4_get_vf_config(struct mlx4_dev *dev, int port, int vf, struct ifla_vf_info *ivf);
0318 int mlx4_set_vf_link_state(struct mlx4_dev *dev, int port, int vf, int link_state);
0319 int mlx4_config_dev_retrieval(struct mlx4_dev *dev,
0320                   struct mlx4_config_dev_params *params);
0321 void mlx4_cmd_wake_completions(struct mlx4_dev *dev);
0322 void mlx4_report_internal_err_comm_event(struct mlx4_dev *dev);
0323 /*
0324  * mlx4_get_slave_default_vlan -
0325  * return true if VST ( default vlan)
0326  * if VST, will return vlan & qos (if not NULL)
0327  */
0328 bool mlx4_get_slave_default_vlan(struct mlx4_dev *dev, int port, int slave,
0329                  u16 *vlan, u8 *qos);
0330
0331 #define MLX4_COMM_GET_IF_REV(cmd_chan_ver) (u8)((cmd_chan_ver) >> 8)
0332 #define COMM_CHAN_EVENT_INTERNAL_ERR (1 << 17)
0333
0334 #endif /* MLX4_CMD_H */