include/linux/mhi_ep.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2022, Linaro Ltd.
0004  *
0005  */
0006 #ifndef _MHI_EP_H_
0007 #define _MHI_EP_H_
0008
0009 #include <linux/dma-direction.h>
0010 #include <linux/mhi.h>
0011
0012 #define MHI_EP_DEFAULT_MTU 0x8000
0013
0014 /**
0015  * struct mhi_ep_channel_config - Channel configuration structure for controller
0016  * @name: The name of this channel
0017  * @num: The number assigned to this channel
0018  * @num_elements: The number of elements that can be queued to this channel
0019  * @dir: Direction that data may flow on this channel
0020  */
0021 struct mhi_ep_channel_config {
0022     char *name;
0023     u32 num;
0024     u32 num_elements;
0025     enum dma_data_direction dir;
0026 };
0027
0028 /**
0029  * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
0030  * @mhi_version: MHI spec version supported by the controller
0031  * @max_channels: Maximum number of channels supported
0032  * @num_channels: Number of channels defined in @ch_cfg
0033  * @ch_cfg: Array of defined channels
0034  */
0035 struct mhi_ep_cntrl_config {
0036     u32 mhi_version;
0037     u32 max_channels;
0038     u32 num_channels;
0039     const struct mhi_ep_channel_config *ch_cfg;
0040 };
0041
0042 /**
0043  * struct mhi_ep_db_info - MHI Endpoint doorbell info
0044  * @mask: Mask of the doorbell interrupt
0045  * @status: Status of the doorbell interrupt
0046  */
0047 struct mhi_ep_db_info {
0048     u32 mask;
0049     u32 status;
0050 };
0051
0052 /**
0053  * struct mhi_ep_cntrl - MHI Endpoint controller structure
0054  * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
0055  *             Endpoint controller
0056  * @mhi_dev: MHI Endpoint device instance for the controller
0057  * @mmio: MMIO region containing the MHI registers
0058  * @mhi_chan: Points to the channel configuration table
0059  * @mhi_event: Points to the event ring configurations table
0060  * @mhi_cmd: Points to the command ring configurations table
0061  * @sm: MHI Endpoint state machine
0062  * @ch_ctx_cache: Cache of host channel context data structure
0063  * @ev_ctx_cache: Cache of host event context data structure
0064  * @cmd_ctx_cache: Cache of host command context data structure
0065  * @ch_ctx_host_pa: Physical address of host channel context data structure
0066  * @ev_ctx_host_pa: Physical address of host event context data structure
0067  * @cmd_ctx_host_pa: Physical address of host command context data structure
0068  * @ch_ctx_cache_phys: Physical address of the host channel context cache
0069  * @ev_ctx_cache_phys: Physical address of the host event context cache
0070  * @cmd_ctx_cache_phys: Physical address of the host command context cache
0071  * @chdb: Array of channel doorbell interrupt info
0072  * @event_lock: Lock for protecting event rings
0073  * @list_lock: Lock for protecting state transition and channel doorbell lists
0074  * @state_lock: Lock for protecting state transitions
0075  * @st_transition_list: List of state transitions
0076  * @ch_db_list: List of queued channel doorbells
0077  * @wq: Dedicated workqueue for handling rings and state changes
0078  * @state_work: State transition worker
0079  * @reset_work: Worker for MHI Endpoint reset
0080  * @cmd_ring_work: Worker for processing command rings
0081  * @ch_ring_work: Worker for processing channel rings
0082  * @raise_irq: CB function for raising IRQ to the host
0083  * @alloc_map: CB function for allocating memory in endpoint for storing host context and mapping it
0084  * @unmap_free: CB function to unmap and free the allocated memory in endpoint for storing host context
0085  * @read_from_host: CB function for reading from host memory from endpoint
0086  * @write_to_host: CB function for writing to host memory from endpoint
0087  * @mhi_state: MHI Endpoint state
0088  * @max_chan: Maximum channels supported by the endpoint controller
0089  * @mru: MRU (Maximum Receive Unit) value of the endpoint controller
0090  * @event_rings: Number of event rings supported by the endpoint controller
0091  * @hw_event_rings: Number of hardware event rings supported by the endpoint controller
0092  * @chdb_offset: Channel doorbell offset set by the host
0093  * @erdb_offset: Event ring doorbell offset set by the host
0094  * @index: MHI Endpoint controller index
0095  * @irq: IRQ used by the endpoint controller
0096  * @enabled: Check if the endpoint controller is enabled or not
0097  */
0098 struct mhi_ep_cntrl {
0099     struct device *cntrl_dev;
0100     struct mhi_ep_device *mhi_dev;
0101     void __iomem *mmio;
0102
0103     struct mhi_ep_chan *mhi_chan;
0104     struct mhi_ep_event *mhi_event;
0105     struct mhi_ep_cmd *mhi_cmd;
0106     struct mhi_ep_sm *sm;
0107
0108     struct mhi_chan_ctxt *ch_ctx_cache;
0109     struct mhi_event_ctxt *ev_ctx_cache;
0110     struct mhi_cmd_ctxt *cmd_ctx_cache;
0111     u64 ch_ctx_host_pa;
0112     u64 ev_ctx_host_pa;
0113     u64 cmd_ctx_host_pa;
0114     phys_addr_t ch_ctx_cache_phys;
0115     phys_addr_t ev_ctx_cache_phys;
0116     phys_addr_t cmd_ctx_cache_phys;
0117
0118     struct mhi_ep_db_info chdb[4];
0119     struct mutex event_lock;
0120     spinlock_t list_lock;
0121     spinlock_t state_lock;
0122
0123     struct list_head st_transition_list;
0124     struct list_head ch_db_list;
0125
0126     struct workqueue_struct *wq;
0127     struct work_struct state_work;
0128     struct work_struct reset_work;
0129     struct work_struct cmd_ring_work;
0130     struct work_struct ch_ring_work;
0131
0132     void (*raise_irq)(struct mhi_ep_cntrl *mhi_cntrl, u32 vector);
0133     int (*alloc_map)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t *phys_ptr,
0134              void __iomem **virt, size_t size);
0135     void (*unmap_free)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t phys,
0136                void __iomem *virt, size_t size);
0137     int (*read_from_host)(struct mhi_ep_cntrl *mhi_cntrl, u64 from, void *to, size_t size);
0138     int (*write_to_host)(struct mhi_ep_cntrl *mhi_cntrl, void *from, u64 to, size_t size);
0139
0140     enum mhi_state mhi_state;
0141
0142     u32 max_chan;
0143     u32 mru;
0144     u32 event_rings;
0145     u32 hw_event_rings;
0146     u32 chdb_offset;
0147     u32 erdb_offset;
0148     u32 index;
0149     int irq;
0150     bool enabled;
0151 };
0152
0153 /**
0154  * struct mhi_ep_device - Structure representing an MHI Endpoint device that binds
0155  *                     to channels or is associated with controllers
0156  * @dev: Driver model device node for the MHI Endpoint device
0157  * @mhi_cntrl: Controller the device belongs to
0158  * @id: Pointer to MHI Endpoint device ID struct
0159  * @name: Name of the associated MHI Endpoint device
0160  * @ul_chan: UL (from host to endpoint) channel for the device
0161  * @dl_chan: DL (from endpoint to host) channel for the device
0162  * @dev_type: MHI device type
0163  */
0164 struct mhi_ep_device {
0165     struct device dev;
0166     struct mhi_ep_cntrl *mhi_cntrl;
0167     const struct mhi_device_id *id;
0168     const char *name;
0169     struct mhi_ep_chan *ul_chan;
0170     struct mhi_ep_chan *dl_chan;
0171     enum mhi_device_type dev_type;
0172 };
0173
0174 /**
0175  * struct mhi_ep_driver - Structure representing a MHI Endpoint client driver
0176  * @id_table: Pointer to MHI Endpoint device ID table
0177  * @driver: Device driver model driver
0178  * @probe: CB function for client driver probe function
0179  * @remove: CB function for client driver remove function
0180  * @ul_xfer_cb: CB function for UL (from host to endpoint) data transfer
0181  * @dl_xfer_cb: CB function for DL (from endpoint to host) data transfer
0182  */
0183 struct mhi_ep_driver {
0184     const struct mhi_device_id *id_table;
0185     struct device_driver driver;
0186     int (*probe)(struct mhi_ep_device *mhi_ep,
0187              const struct mhi_device_id *id);
0188     void (*remove)(struct mhi_ep_device *mhi_ep);
0189     void (*ul_xfer_cb)(struct mhi_ep_device *mhi_dev,
0190                struct mhi_result *result);
0191     void (*dl_xfer_cb)(struct mhi_ep_device *mhi_dev,
0192                struct mhi_result *result);
0193 };
0194
0195 #define to_mhi_ep_device(dev) container_of(dev, struct mhi_ep_device, dev)
0196 #define to_mhi_ep_driver(drv) container_of(drv, struct mhi_ep_driver, driver)
0197
0198 /*
0199  * module_mhi_ep_driver() - Helper macro for drivers that don't do
0200  * anything special other than using default mhi_ep_driver_register() and
0201  * mhi_ep_driver_unregister().  This eliminates a lot of boilerplate.
0202  * Each module may only use this macro once.
0203  */
0204 #define module_mhi_ep_driver(mhi_drv) \
0205     module_driver(mhi_drv, mhi_ep_driver_register, \
0206               mhi_ep_driver_unregister)
0207
0208 /*
0209  * Macro to avoid include chaining to get THIS_MODULE
0210  */
0211 #define mhi_ep_driver_register(mhi_drv) \
0212     __mhi_ep_driver_register(mhi_drv, THIS_MODULE)
0213
0214 /**
0215  * __mhi_ep_driver_register - Register a driver with MHI Endpoint bus
0216  * @mhi_drv: Driver to be associated with the device
0217  * @owner: The module owner
0218  *
0219  * Return: 0 if driver registrations succeeds, a negative error code otherwise.
0220  */
0221 int __mhi_ep_driver_register(struct mhi_ep_driver *mhi_drv, struct module *owner);
0222
0223 /**
0224  * mhi_ep_driver_unregister - Unregister a driver from MHI Endpoint bus
0225  * @mhi_drv: Driver associated with the device
0226  */
0227 void mhi_ep_driver_unregister(struct mhi_ep_driver *mhi_drv);
0228
0229 /**
0230  * mhi_ep_register_controller - Register MHI Endpoint controller
0231  * @mhi_cntrl: MHI Endpoint controller to register
0232  * @config: Configuration to use for the controller
0233  *
0234  * Return: 0 if controller registrations succeeds, a negative error code otherwise.
0235  */
0236 int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl,
0237                    const struct mhi_ep_cntrl_config *config);
0238
0239 /**
0240  * mhi_ep_unregister_controller - Unregister MHI Endpoint controller
0241  * @mhi_cntrl: MHI Endpoint controller to unregister
0242  */
0243 void mhi_ep_unregister_controller(struct mhi_ep_cntrl *mhi_cntrl);
0244
0245 /**
0246  * mhi_ep_power_up - Power up the MHI endpoint stack
0247  * @mhi_cntrl: MHI Endpoint controller
0248  *
0249  * Return: 0 if power up succeeds, a negative error code otherwise.
0250  */
0251 int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl);
0252
0253 /**
0254  * mhi_ep_power_down - Power down the MHI endpoint stack
0255  * @mhi_cntrl: MHI controller
0256  */
0257 void mhi_ep_power_down(struct mhi_ep_cntrl *mhi_cntrl);
0258
0259 /**
0260  * mhi_ep_queue_is_empty - Determine whether the transfer queue is empty
0261  * @mhi_dev: Device associated with the channels
0262  * @dir: DMA direction for the channel
0263  *
0264  * Return: true if the queue is empty, false otherwise.
0265  */
0266 bool mhi_ep_queue_is_empty(struct mhi_ep_device *mhi_dev, enum dma_data_direction dir);
0267
0268 /**
0269  * mhi_ep_queue_skb - Send SKBs to host over MHI Endpoint
0270  * @mhi_dev: Device associated with the DL channel
0271  * @skb: SKBs to be queued
0272  *
0273  * Return: 0 if the SKBs has been sent successfully, a negative error code otherwise.
0274  */
0275 int mhi_ep_queue_skb(struct mhi_ep_device *mhi_dev, struct sk_buff *skb);
0276
0277 #endif