include/linux/mhi.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
0004  *
0005  */
0006 #ifndef _MHI_H_
0007 #define _MHI_H_
0008
0009 #include <linux/device.h>
0010 #include <linux/dma-direction.h>
0011 #include <linux/mutex.h>
0012 #include <linux/skbuff.h>
0013 #include <linux/slab.h>
0014 #include <linux/spinlock.h>
0015 #include <linux/wait.h>
0016 #include <linux/workqueue.h>
0017
0018 #define MHI_MAX_OEM_PK_HASH_SEGMENTS 16
0019
0020 struct mhi_chan;
0021 struct mhi_event;
0022 struct mhi_ctxt;
0023 struct mhi_cmd;
0024 struct mhi_buf_info;
0025
0026 /**
0027  * enum mhi_callback - MHI callback
0028  * @MHI_CB_IDLE: MHI entered idle state
0029  * @MHI_CB_PENDING_DATA: New data available for client to process
0030  * @MHI_CB_LPM_ENTER: MHI host entered low power mode
0031  * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode
0032  * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env
0033  * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env
0034  * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover)
0035  * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state
0036  * @MHI_CB_BW_REQ: Received a bandwidth switch request from device
0037  */
0038 enum mhi_callback {
0039     MHI_CB_IDLE,
0040     MHI_CB_PENDING_DATA,
0041     MHI_CB_LPM_ENTER,
0042     MHI_CB_LPM_EXIT,
0043     MHI_CB_EE_RDDM,
0044     MHI_CB_EE_MISSION_MODE,
0045     MHI_CB_SYS_ERROR,
0046     MHI_CB_FATAL_ERROR,
0047     MHI_CB_BW_REQ,
0048 };
0049
0050 /**
0051  * enum mhi_flags - Transfer flags
0052  * @MHI_EOB: End of buffer for bulk transfer
0053  * @MHI_EOT: End of transfer
0054  * @MHI_CHAIN: Linked transfer
0055  */
0056 enum mhi_flags {
0057     MHI_EOB = BIT(0),
0058     MHI_EOT = BIT(1),
0059     MHI_CHAIN = BIT(2),
0060 };
0061
0062 /**
0063  * enum mhi_device_type - Device types
0064  * @MHI_DEVICE_XFER: Handles data transfer
0065  * @MHI_DEVICE_CONTROLLER: Control device
0066  */
0067 enum mhi_device_type {
0068     MHI_DEVICE_XFER,
0069     MHI_DEVICE_CONTROLLER,
0070 };
0071
0072 /**
0073  * enum mhi_ch_type - Channel types
0074  * @MHI_CH_TYPE_INVALID: Invalid channel type
0075  * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device
0076  * @MHI_CH_TYPE_INBOUND: Inbound channel from the device
0077  * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine
0078  *                 multiple packets and send them as a single
0079  *                 large packet to reduce CPU consumption
0080  */
0081 enum mhi_ch_type {
0082     MHI_CH_TYPE_INVALID = 0,
0083     MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE,
0084     MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE,
0085     MHI_CH_TYPE_INBOUND_COALESCED = 3,
0086 };
0087
0088 /**
0089  * struct image_info - Firmware and RDDM table
0090  * @mhi_buf: Buffer for firmware and RDDM table
0091  * @entries: # of entries in table
0092  */
0093 struct image_info {
0094     struct mhi_buf *mhi_buf;
0095     /* private: from internal.h */
0096     struct bhi_vec_entry *bhi_vec;
0097     /* public: */
0098     u32 entries;
0099 };
0100
0101 /**
0102  * struct mhi_link_info - BW requirement
0103  * target_link_speed - Link speed as defined by TLS bits in LinkControl reg
0104  * target_link_width - Link width as defined by NLW bits in LinkStatus reg
0105  */
0106 struct mhi_link_info {
0107     unsigned int target_link_speed;
0108     unsigned int target_link_width;
0109 };
0110
0111 /**
0112  * enum mhi_ee_type - Execution environment types
0113  * @MHI_EE_PBL: Primary Bootloader
0114  * @MHI_EE_SBL: Secondary Bootloader
0115  * @MHI_EE_AMSS: Modem, aka the primary runtime EE
0116  * @MHI_EE_RDDM: Ram dump download mode
0117  * @MHI_EE_WFW: WLAN firmware mode
0118  * @MHI_EE_PTHRU: Passthrough
0119  * @MHI_EE_EDL: Embedded downloader
0120  * @MHI_EE_FP: Flash Programmer Environment
0121  */
0122 enum mhi_ee_type {
0123     MHI_EE_PBL,
0124     MHI_EE_SBL,
0125     MHI_EE_AMSS,
0126     MHI_EE_RDDM,
0127     MHI_EE_WFW,
0128     MHI_EE_PTHRU,
0129     MHI_EE_EDL,
0130     MHI_EE_FP,
0131     MHI_EE_MAX_SUPPORTED = MHI_EE_FP,
0132     MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */
0133     MHI_EE_NOT_SUPPORTED,
0134     MHI_EE_MAX,
0135 };
0136
0137 /**
0138  * enum mhi_state - MHI states
0139  * @MHI_STATE_RESET: Reset state
0140  * @MHI_STATE_READY: Ready state
0141  * @MHI_STATE_M0: M0 state
0142  * @MHI_STATE_M1: M1 state
0143  * @MHI_STATE_M2: M2 state
0144  * @MHI_STATE_M3: M3 state
0145  * @MHI_STATE_M3_FAST: M3 Fast state
0146  * @MHI_STATE_BHI: BHI state
0147  * @MHI_STATE_SYS_ERR: System Error state
0148  */
0149 enum mhi_state {
0150     MHI_STATE_RESET = 0x0,
0151     MHI_STATE_READY = 0x1,
0152     MHI_STATE_M0 = 0x2,
0153     MHI_STATE_M1 = 0x3,
0154     MHI_STATE_M2 = 0x4,
0155     MHI_STATE_M3 = 0x5,
0156     MHI_STATE_M3_FAST = 0x6,
0157     MHI_STATE_BHI = 0x7,
0158     MHI_STATE_SYS_ERR = 0xFF,
0159     MHI_STATE_MAX,
0160 };
0161
0162 /**
0163  * enum mhi_ch_ee_mask - Execution environment mask for channel
0164  * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE
0165  * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE
0166  * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE
0167  * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE
0168  * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE
0169  * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE
0170  * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE
0171  */
0172 enum mhi_ch_ee_mask {
0173     MHI_CH_EE_PBL = BIT(MHI_EE_PBL),
0174     MHI_CH_EE_SBL = BIT(MHI_EE_SBL),
0175     MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS),
0176     MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM),
0177     MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU),
0178     MHI_CH_EE_WFW = BIT(MHI_EE_WFW),
0179     MHI_CH_EE_EDL = BIT(MHI_EE_EDL),
0180 };
0181
0182 /**
0183  * enum mhi_er_data_type - Event ring data types
0184  * @MHI_ER_DATA: Only client data over this ring
0185  * @MHI_ER_CTRL: MHI control data and client data
0186  */
0187 enum mhi_er_data_type {
0188     MHI_ER_DATA,
0189     MHI_ER_CTRL,
0190 };
0191
0192 /**
0193  * enum mhi_db_brst_mode - Doorbell mode
0194  * @MHI_DB_BRST_DISABLE: Burst mode disable
0195  * @MHI_DB_BRST_ENABLE: Burst mode enable
0196  */
0197 enum mhi_db_brst_mode {
0198     MHI_DB_BRST_DISABLE = 0x2,
0199     MHI_DB_BRST_ENABLE = 0x3,
0200 };
0201
0202 /**
0203  * struct mhi_channel_config - Channel configuration structure for controller
0204  * @name: The name of this channel
0205  * @num: The number assigned to this channel
0206  * @num_elements: The number of elements that can be queued to this channel
0207  * @local_elements: The local ring length of the channel
0208  * @event_ring: The event ring index that services this channel
0209  * @dir: Direction that data may flow on this channel
0210  * @type: Channel type
0211  * @ee_mask: Execution Environment mask for this channel
0212  * @pollcfg: Polling configuration for burst mode.  0 is default.  milliseconds
0213          for UL channels, multiple of 8 ring elements for DL channels
0214  * @doorbell: Doorbell mode
0215  * @lpm_notify: The channel master requires low power mode notifications
0216  * @offload_channel: The client manages the channel completely
0217  * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition
0218  * @auto_queue: Framework will automatically queue buffers for DL traffic
0219  * @wake-capable: Channel capable of waking up the system
0220  */
0221 struct mhi_channel_config {
0222     char *name;
0223     u32 num;
0224     u32 num_elements;
0225     u32 local_elements;
0226     u32 event_ring;
0227     enum dma_data_direction dir;
0228     enum mhi_ch_type type;
0229     u32 ee_mask;
0230     u32 pollcfg;
0231     enum mhi_db_brst_mode doorbell;
0232     bool lpm_notify;
0233     bool offload_channel;
0234     bool doorbell_mode_switch;
0235     bool auto_queue;
0236     bool wake_capable;
0237 };
0238
0239 /**
0240  * struct mhi_event_config - Event ring configuration structure for controller
0241  * @num_elements: The number of elements that can be queued to this ring
0242  * @irq_moderation_ms: Delay irq for additional events to be aggregated
0243  * @irq: IRQ associated with this ring
0244  * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring
0245  * @priority: Priority of this ring. Use 1 for now
0246  * @mode: Doorbell mode
0247  * @data_type: Type of data this ring will process
0248  * @hardware_event: This ring is associated with hardware channels
0249  * @client_managed: This ring is client managed
0250  * @offload_channel: This ring is associated with an offloaded channel
0251  */
0252 struct mhi_event_config {
0253     u32 num_elements;
0254     u32 irq_moderation_ms;
0255     u32 irq;
0256     u32 channel;
0257     u32 priority;
0258     enum mhi_db_brst_mode mode;
0259     enum mhi_er_data_type data_type;
0260     bool hardware_event;
0261     bool client_managed;
0262     bool offload_channel;
0263 };
0264
0265 /**
0266  * struct mhi_controller_config - Root MHI controller configuration
0267  * @max_channels: Maximum number of channels supported
0268  * @timeout_ms: Timeout value for operations. 0 means use default
0269  * @buf_len: Size of automatically allocated buffers. 0 means use default
0270  * @num_channels: Number of channels defined in @ch_cfg
0271  * @ch_cfg: Array of defined channels
0272  * @num_events: Number of event rings defined in @event_cfg
0273  * @event_cfg: Array of defined event rings
0274  * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access
0275  * @m2_no_db: Host is not allowed to ring DB in M2 state
0276  */
0277 struct mhi_controller_config {
0278     u32 max_channels;
0279     u32 timeout_ms;
0280     u32 buf_len;
0281     u32 num_channels;
0282     const struct mhi_channel_config *ch_cfg;
0283     u32 num_events;
0284     struct mhi_event_config *event_cfg;
0285     bool use_bounce_buf;
0286     bool m2_no_db;
0287 };
0288
0289 /**
0290  * struct mhi_controller - Master MHI controller structure
0291  * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
0292  *            controller (required)
0293  * @mhi_dev: MHI device instance for the controller
0294  * @debugfs_dentry: MHI controller debugfs directory
0295  * @regs: Base address of MHI MMIO register space (required)
0296  * @bhi: Points to base of MHI BHI register space
0297  * @bhie: Points to base of MHI BHIe register space
0298  * @wake_db: MHI WAKE doorbell register address
0299  * @iova_start: IOMMU starting address for data (required)
0300  * @iova_stop: IOMMU stop address for data (required)
0301  * @fw_image: Firmware image name for normal booting (optional)
0302  * @edl_image: Firmware image name for emergency download mode (optional)
0303  * @rddm_size: RAM dump size that host should allocate for debugging purpose
0304  * @sbl_size: SBL image size downloaded through BHIe (optional)
0305  * @seg_len: BHIe vector size (optional)
0306  * @reg_len: Length of the MHI MMIO region (required)
0307  * @fbc_image: Points to firmware image buffer
0308  * @rddm_image: Points to RAM dump buffer
0309  * @mhi_chan: Points to the channel configuration table
0310  * @lpm_chans: List of channels that require LPM notifications
0311  * @irq: base irq # to request (required)
0312  * @max_chan: Maximum number of channels the controller supports
0313  * @total_ev_rings: Total # of event rings allocated
0314  * @hw_ev_rings: Number of hardware event rings
0315  * @sw_ev_rings: Number of software event rings
0316  * @nr_irqs: Number of IRQ allocated by bus master (required)
0317  * @family_number: MHI controller family number
0318  * @device_number: MHI controller device number
0319  * @major_version: MHI controller major revision number
0320  * @minor_version: MHI controller minor revision number
0321  * @serial_number: MHI controller serial number obtained from BHI
0322  * @oem_pk_hash: MHI controller OEM PK Hash obtained from BHI
0323  * @mhi_event: MHI event ring configurations table
0324  * @mhi_cmd: MHI command ring configurations table
0325  * @mhi_ctxt: MHI device context, shared memory between host and device
0326  * @pm_mutex: Mutex for suspend/resume operation
0327  * @pm_lock: Lock for protecting MHI power management state
0328  * @timeout_ms: Timeout in ms for state transitions
0329  * @pm_state: MHI power management state
0330  * @db_access: DB access states
0331  * @ee: MHI device execution environment
0332  * @dev_state: MHI device state
0333  * @dev_wake: Device wakeup count
0334  * @pending_pkts: Pending packets for the controller
0335  * @M0, M2, M3: Counters to track number of device MHI state changes
0336  * @transition_list: List of MHI state transitions
0337  * @transition_lock: Lock for protecting MHI state transition list
0338  * @wlock: Lock for protecting device wakeup
0339  * @mhi_link_info: Device bandwidth info
0340  * @st_worker: State transition worker
0341  * @hiprio_wq: High priority workqueue for MHI work such as state transitions
0342  * @state_event: State change event
0343  * @status_cb: CB function to notify power states of the device (required)
0344  * @wake_get: CB function to assert device wake (optional)
0345  * @wake_put: CB function to de-assert device wake (optional)
0346  * @wake_toggle: CB function to assert and de-assert device wake (optional)
0347  * @runtime_get: CB function to controller runtime resume (required)
0348  * @runtime_put: CB function to decrement pm usage (required)
0349  * @map_single: CB function to create TRE buffer
0350  * @unmap_single: CB function to destroy TRE buffer
0351  * @read_reg: Read a MHI register via the physical link (required)
0352  * @write_reg: Write a MHI register via the physical link (required)
0353  * @reset: Controller specific reset function (optional)
0354  * @buffer_len: Bounce buffer length
0355  * @index: Index of the MHI controller instance
0356  * @bounce_buf: Use of bounce buffer
0357  * @fbc_download: MHI host needs to do complete image transfer (optional)
0358  * @wake_set: Device wakeup set flag
0359  * @irq_flags: irq flags passed to request_irq (optional)
0360  * @mru: the default MRU for the MHI device
0361  *
0362  * Fields marked as (required) need to be populated by the controller driver
0363  * before calling mhi_register_controller(). For the fields marked as (optional)
0364  * they can be populated depending on the usecase.
0365  *
0366  * The following fields are present for the purpose of implementing any device
0367  * specific quirks or customizations for specific MHI revisions used in device
0368  * by the controller drivers. The MHI stack will just populate these fields
0369  * during mhi_register_controller():
0370  *  family_number
0371  *  device_number
0372  *  major_version
0373  *  minor_version
0374  */
0375 struct mhi_controller {
0376     struct device *cntrl_dev;
0377     struct mhi_device *mhi_dev;
0378     struct dentry *debugfs_dentry;
0379     void __iomem *regs;
0380     void __iomem *bhi;
0381     void __iomem *bhie;
0382     void __iomem *wake_db;
0383
0384     dma_addr_t iova_start;
0385     dma_addr_t iova_stop;
0386     const char *fw_image;
0387     const char *edl_image;
0388     size_t rddm_size;
0389     size_t sbl_size;
0390     size_t seg_len;
0391     size_t reg_len;
0392     struct image_info *fbc_image;
0393     struct image_info *rddm_image;
0394     struct mhi_chan *mhi_chan;
0395     struct list_head lpm_chans;
0396     int *irq;
0397     u32 max_chan;
0398     u32 total_ev_rings;
0399     u32 hw_ev_rings;
0400     u32 sw_ev_rings;
0401     u32 nr_irqs;
0402     u32 family_number;
0403     u32 device_number;
0404     u32 major_version;
0405     u32 minor_version;
0406     u32 serial_number;
0407     u32 oem_pk_hash[MHI_MAX_OEM_PK_HASH_SEGMENTS];
0408
0409     struct mhi_event *mhi_event;
0410     struct mhi_cmd *mhi_cmd;
0411     struct mhi_ctxt *mhi_ctxt;
0412
0413     struct mutex pm_mutex;
0414     rwlock_t pm_lock;
0415     u32 timeout_ms;
0416     u32 pm_state;
0417     u32 db_access;
0418     enum mhi_ee_type ee;
0419     enum mhi_state dev_state;
0420     atomic_t dev_wake;
0421     atomic_t pending_pkts;
0422     u32 M0, M2, M3;
0423     struct list_head transition_list;
0424     spinlock_t transition_lock;
0425     spinlock_t wlock;
0426     struct mhi_link_info mhi_link_info;
0427     struct work_struct st_worker;
0428     struct workqueue_struct *hiprio_wq;
0429     wait_queue_head_t state_event;
0430
0431     void (*status_cb)(struct mhi_controller *mhi_cntrl,
0432               enum mhi_callback cb);
0433     void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override);
0434     void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override);
0435     void (*wake_toggle)(struct mhi_controller *mhi_cntrl);
0436     int (*runtime_get)(struct mhi_controller *mhi_cntrl);
0437     void (*runtime_put)(struct mhi_controller *mhi_cntrl);
0438     int (*map_single)(struct mhi_controller *mhi_cntrl,
0439               struct mhi_buf_info *buf);
0440     void (*unmap_single)(struct mhi_controller *mhi_cntrl,
0441                  struct mhi_buf_info *buf);
0442     int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
0443             u32 *out);
0444     void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
0445               u32 val);
0446     void (*reset)(struct mhi_controller *mhi_cntrl);
0447
0448     size_t buffer_len;
0449     int index;
0450     bool bounce_buf;
0451     bool fbc_download;
0452     bool wake_set;
0453     unsigned long irq_flags;
0454     u32 mru;
0455 };
0456
0457 /**
0458  * struct mhi_device - Structure representing an MHI device which binds
0459  *                     to channels or is associated with controllers
0460  * @id: Pointer to MHI device ID struct
0461  * @name: Name of the associated MHI device
0462  * @mhi_cntrl: Controller the device belongs to
0463  * @ul_chan: UL channel for the device
0464  * @dl_chan: DL channel for the device
0465  * @dev: Driver model device node for the MHI device
0466  * @dev_type: MHI device type
0467  * @ul_chan_id: MHI channel id for UL transfer
0468  * @dl_chan_id: MHI channel id for DL transfer
0469  * @dev_wake: Device wakeup counter
0470  */
0471 struct mhi_device {
0472     const struct mhi_device_id *id;
0473     const char *name;
0474     struct mhi_controller *mhi_cntrl;
0475     struct mhi_chan *ul_chan;
0476     struct mhi_chan *dl_chan;
0477     struct device dev;
0478     enum mhi_device_type dev_type;
0479     int ul_chan_id;
0480     int dl_chan_id;
0481     u32 dev_wake;
0482 };
0483
0484 /**
0485  * struct mhi_result - Completed buffer information
0486  * @buf_addr: Address of data buffer
0487  * @bytes_xferd: # of bytes transferred
0488  * @dir: Channel direction
0489  * @transaction_status: Status of last transaction
0490  */
0491 struct mhi_result {
0492     void *buf_addr;
0493     size_t bytes_xferd;
0494     enum dma_data_direction dir;
0495     int transaction_status;
0496 };
0497
0498 /**
0499  * struct mhi_buf - MHI Buffer description
0500  * @buf: Virtual address of the buffer
0501  * @name: Buffer label. For offload channel, configurations name must be:
0502  *        ECA - Event context array data
0503  *        CCA - Channel context array data
0504  * @dma_addr: IOMMU address of the buffer
0505  * @len: # of bytes
0506  */
0507 struct mhi_buf {
0508     void *buf;
0509     const char *name;
0510     dma_addr_t dma_addr;
0511     size_t len;
0512 };
0513
0514 /**
0515  * struct mhi_driver - Structure representing a MHI client driver
0516  * @probe: CB function for client driver probe function
0517  * @remove: CB function for client driver remove function
0518  * @ul_xfer_cb: CB function for UL data transfer
0519  * @dl_xfer_cb: CB function for DL data transfer
0520  * @status_cb: CB functions for asynchronous status
0521  * @driver: Device driver model driver
0522  */
0523 struct mhi_driver {
0524     const struct mhi_device_id *id_table;
0525     int (*probe)(struct mhi_device *mhi_dev,
0526              const struct mhi_device_id *id);
0527     void (*remove)(struct mhi_device *mhi_dev);
0528     void (*ul_xfer_cb)(struct mhi_device *mhi_dev,
0529                struct mhi_result *result);
0530     void (*dl_xfer_cb)(struct mhi_device *mhi_dev,
0531                struct mhi_result *result);
0532     void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb);
0533     struct device_driver driver;
0534 };
0535
0536 #define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver)
0537 #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev)
0538
0539 /**
0540  * mhi_alloc_controller - Allocate the MHI Controller structure
0541  * Allocate the mhi_controller structure using zero initialized memory
0542  */
0543 struct mhi_controller *mhi_alloc_controller(void);
0544
0545 /**
0546  * mhi_free_controller - Free the MHI Controller structure
0547  * Free the mhi_controller structure which was previously allocated
0548  */
0549 void mhi_free_controller(struct mhi_controller *mhi_cntrl);
0550
0551 /**
0552  * mhi_register_controller - Register MHI controller
0553  * @mhi_cntrl: MHI controller to register
0554  * @config: Configuration to use for the controller
0555  */
0556 int mhi_register_controller(struct mhi_controller *mhi_cntrl,
0557             const struct mhi_controller_config *config);
0558
0559 /**
0560  * mhi_unregister_controller - Unregister MHI controller
0561  * @mhi_cntrl: MHI controller to unregister
0562  */
0563 void mhi_unregister_controller(struct mhi_controller *mhi_cntrl);
0564
0565 /*
0566  * module_mhi_driver() - Helper macro for drivers that don't do
0567  * anything special other than using default mhi_driver_register() and
0568  * mhi_driver_unregister().  This eliminates a lot of boilerplate.
0569  * Each module may only use this macro once.
0570  */
0571 #define module_mhi_driver(mhi_drv) \
0572     module_driver(mhi_drv, mhi_driver_register, \
0573               mhi_driver_unregister)
0574
0575 /*
0576  * Macro to avoid include chaining to get THIS_MODULE
0577  */
0578 #define mhi_driver_register(mhi_drv) \
0579     __mhi_driver_register(mhi_drv, THIS_MODULE)
0580
0581 /**
0582  * __mhi_driver_register - Register driver with MHI framework
0583  * @mhi_drv: Driver associated with the device
0584  * @owner: The module owner
0585  */
0586 int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner);
0587
0588 /**
0589  * mhi_driver_unregister - Unregister a driver for mhi_devices
0590  * @mhi_drv: Driver associated with the device
0591  */
0592 void mhi_driver_unregister(struct mhi_driver *mhi_drv);
0593
0594 /**
0595  * mhi_set_mhi_state - Set MHI device state
0596  * @mhi_cntrl: MHI controller
0597  * @state: State to set
0598  */
0599 void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl,
0600                enum mhi_state state);
0601
0602 /**
0603  * mhi_notify - Notify the MHI client driver about client device status
0604  * @mhi_dev: MHI device instance
0605  * @cb_reason: MHI callback reason
0606  */
0607 void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason);
0608
0609 /**
0610  * mhi_get_free_desc_count - Get transfer ring length
0611  * Get # of TD available to queue buffers
0612  * @mhi_dev: Device associated with the channels
0613  * @dir: Direction of the channel
0614  */
0615 int mhi_get_free_desc_count(struct mhi_device *mhi_dev,
0616                 enum dma_data_direction dir);
0617
0618 /**
0619  * mhi_prepare_for_power_up - Do pre-initialization before power up.
0620  *                            This is optional, call this before power up if
0621  *                            the controller does not want bus framework to
0622  *                            automatically free any allocated memory during
0623  *                            shutdown process.
0624  * @mhi_cntrl: MHI controller
0625  */
0626 int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl);
0627
0628 /**
0629  * mhi_async_power_up - Start MHI power up sequence
0630  * @mhi_cntrl: MHI controller
0631  */
0632 int mhi_async_power_up(struct mhi_controller *mhi_cntrl);
0633
0634 /**
0635  * mhi_sync_power_up - Start MHI power up sequence and wait till the device
0636  *                     enters valid EE state
0637  * @mhi_cntrl: MHI controller
0638  */
0639 int mhi_sync_power_up(struct mhi_controller *mhi_cntrl);
0640
0641 /**
0642  * mhi_power_down - Start MHI power down sequence
0643  * @mhi_cntrl: MHI controller
0644  * @graceful: Link is still accessible, so do a graceful shutdown process
0645  */
0646 void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful);
0647
0648 /**
0649  * mhi_unprepare_after_power_down - Free any allocated memory after power down
0650  * @mhi_cntrl: MHI controller
0651  */
0652 void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl);
0653
0654 /**
0655  * mhi_pm_suspend - Move MHI into a suspended state
0656  * @mhi_cntrl: MHI controller
0657  */
0658 int mhi_pm_suspend(struct mhi_controller *mhi_cntrl);
0659
0660 /**
0661  * mhi_pm_resume - Resume MHI from suspended state
0662  * @mhi_cntrl: MHI controller
0663  */
0664 int mhi_pm_resume(struct mhi_controller *mhi_cntrl);
0665
0666 /**
0667  * mhi_pm_resume_force - Force resume MHI from suspended state
0668  * @mhi_cntrl: MHI controller
0669  *
0670  * Resume the device irrespective of its MHI state. As per the MHI spec, devices
0671  * has to be in M3 state during resume. But some devices seem to be in a
0672  * different MHI state other than M3 but they continue working fine if allowed.
0673  * This API is intented to be used for such devices.
0674  *
0675  * Return: 0 if the resume succeeds, a negative error code otherwise
0676  */
0677 int mhi_pm_resume_force(struct mhi_controller *mhi_cntrl);
0678
0679 /**
0680  * mhi_download_rddm_image - Download ramdump image from device for
0681  *                           debugging purpose.
0682  * @mhi_cntrl: MHI controller
0683  * @in_panic: Download rddm image during kernel panic
0684  */
0685 int mhi_download_rddm_image(struct mhi_controller *mhi_cntrl, bool in_panic);
0686
0687 /**
0688  * mhi_force_rddm_mode - Force device into rddm mode
0689  * @mhi_cntrl: MHI controller
0690  */
0691 int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl);
0692
0693 /**
0694  * mhi_get_exec_env - Get BHI execution environment of the device
0695  * @mhi_cntrl: MHI controller
0696  */
0697 enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl);
0698
0699 /**
0700  * mhi_get_mhi_state - Get MHI state of the device
0701  * @mhi_cntrl: MHI controller
0702  */
0703 enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl);
0704
0705 /**
0706  * mhi_soc_reset - Trigger a device reset. This can be used as a last resort
0707  *         to reset and recover a device.
0708  * @mhi_cntrl: MHI controller
0709  */
0710 void mhi_soc_reset(struct mhi_controller *mhi_cntrl);
0711
0712 /**
0713  * mhi_device_get - Disable device low power mode
0714  * @mhi_dev: Device associated with the channel
0715  */
0716 void mhi_device_get(struct mhi_device *mhi_dev);
0717
0718 /**
0719  * mhi_device_get_sync - Disable device low power mode. Synchronously
0720  *                       take the controller out of suspended state
0721  * @mhi_dev: Device associated with the channel
0722  */
0723 int mhi_device_get_sync(struct mhi_device *mhi_dev);
0724
0725 /**
0726  * mhi_device_put - Re-enable device low power mode
0727  * @mhi_dev: Device associated with the channel
0728  */
0729 void mhi_device_put(struct mhi_device *mhi_dev);
0730
0731 /**
0732  * mhi_prepare_for_transfer - Setup UL and DL channels for data transfer.
0733  * @mhi_dev: Device associated with the channels
0734  *
0735  * Allocate and initialize the channel context and also issue the START channel
0736  * command to both channels. Channels can be started only if both host and
0737  * device execution environments match and channels are in a DISABLED state.
0738  */
0739 int mhi_prepare_for_transfer(struct mhi_device *mhi_dev);
0740
0741 /**
0742  * mhi_prepare_for_transfer_autoqueue - Setup UL and DL channels with auto queue
0743  *                                      buffers for DL traffic
0744  * @mhi_dev: Device associated with the channels
0745  *
0746  * Allocate and initialize the channel context and also issue the START channel
0747  * command to both channels. Channels can be started only if both host and
0748  * device execution environments match and channels are in a DISABLED state.
0749  * The MHI core will automatically allocate and queue buffers for the DL traffic.
0750  */
0751 int mhi_prepare_for_transfer_autoqueue(struct mhi_device *mhi_dev);
0752
0753 /**
0754  * mhi_unprepare_from_transfer - Reset UL and DL channels for data transfer.
0755  *                               Issue the RESET channel command and let the
0756  *                               device clean-up the context so no incoming
0757  *                               transfers are seen on the host. Free memory
0758  *                               associated with the context on host. If device
0759  *                               is unresponsive, only perform a host side
0760  *                               clean-up. Channels can be reset only if both
0761  *                               host and device execution environments match
0762  *                               and channels are in an ENABLED, STOPPED or
0763  *                               SUSPENDED state.
0764  * @mhi_dev: Device associated with the channels
0765  */
0766 void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev);
0767
0768 /**
0769  * mhi_poll - Poll for any available data in DL direction
0770  * @mhi_dev: Device associated with the channels
0771  * @budget: # of events to process
0772  */
0773 int mhi_poll(struct mhi_device *mhi_dev, u32 budget);
0774
0775 /**
0776  * mhi_queue_dma - Send or receive DMA mapped buffers from client device
0777  *                 over MHI channel
0778  * @mhi_dev: Device associated with the channels
0779  * @dir: DMA direction for the channel
0780  * @mhi_buf: Buffer for holding the DMA mapped data
0781  * @len: Buffer length
0782  * @mflags: MHI transfer flags used for the transfer
0783  */
0784 int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir,
0785           struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags);
0786
0787 /**
0788  * mhi_queue_buf - Send or receive raw buffers from client device over MHI
0789  *                 channel
0790  * @mhi_dev: Device associated with the channels
0791  * @dir: DMA direction for the channel
0792  * @buf: Buffer for holding the data
0793  * @len: Buffer length
0794  * @mflags: MHI transfer flags used for the transfer
0795  */
0796 int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir,
0797           void *buf, size_t len, enum mhi_flags mflags);
0798
0799 /**
0800  * mhi_queue_skb - Send or receive SKBs from client device over MHI channel
0801  * @mhi_dev: Device associated with the channels
0802  * @dir: DMA direction for the channel
0803  * @skb: Buffer for holding SKBs
0804  * @len: Buffer length
0805  * @mflags: MHI transfer flags used for the transfer
0806  */
0807 int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir,
0808           struct sk_buff *skb, size_t len, enum mhi_flags mflags);
0809
0810 /**
0811  * mhi_queue_is_full - Determine whether queueing new elements is possible
0812  * @mhi_dev: Device associated with the channels
0813  * @dir: DMA direction for the channel
0814  */
0815 bool mhi_queue_is_full(struct mhi_device *mhi_dev, enum dma_data_direction dir);
0816
0817 #endif /* _MHI_H_ */