mfd/wm8994/pdata.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * include/linux/mfd/wm8994/pdata.h -- Platform data for WM8994
0004  *
0005  * Copyright 2009 Wolfson Microelectronics PLC.
0006  *
0007  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
0008  */
0009
0010 #ifndef __MFD_WM8994_PDATA_H__
0011 #define __MFD_WM8994_PDATA_H__
0012
0013 #define WM8994_NUM_LDO   2
0014 #define WM8994_NUM_GPIO 11
0015 #define WM8994_NUM_AIF   3
0016
0017 struct wm8994_ldo_pdata {
0018     const struct regulator_init_data *init_data;
0019 };
0020
0021 #define WM8994_CONFIGURE_GPIO 0x10000
0022
0023 #define WM8994_DRC_REGS 5
0024 #define WM8994_EQ_REGS  20
0025 #define WM8958_MBC_CUTOFF_REGS 20
0026 #define WM8958_MBC_COEFF_REGS  48
0027 #define WM8958_MBC_COMBINED_REGS 56
0028 #define WM8958_VSS_HPF_REGS 2
0029 #define WM8958_VSS_REGS 148
0030 #define WM8958_ENH_EQ_REGS 32
0031
0032 /**
0033  * DRC configurations are specified with a label and a set of register
0034  * values to write (the enable bits will be ignored).  At runtime an
0035  * enumerated control will be presented for each DRC block allowing
0036  * the user to choose the configuration to use.
0037  *
0038  * Configurations may be generated by hand or by using the DRC control
0039  * panel provided by the WISCE - see  http://www.wolfsonmicro.com/wisce/
0040  * for details.
0041  */
0042 struct wm8994_drc_cfg {
0043         const char *name;
0044         u16 regs[WM8994_DRC_REGS];
0045 };
0046
0047 /**
0048  * ReTune Mobile configurations are specified with a label, sample
0049  * rate and set of values to write (the enable bits will be ignored).
0050  *
0051  * Configurations are expected to be generated using the ReTune Mobile
0052  * control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
0053  */
0054 struct wm8994_retune_mobile_cfg {
0055         const char *name;
0056         unsigned int rate;
0057         u16 regs[WM8994_EQ_REGS];
0058 };
0059
0060 /**
0061  * Multiband compressor configurations are specified with a label and
0062  * two sets of values to write.  Configurations are expected to be
0063  * generated using the multiband compressor configuration panel in
0064  * WISCE - see http://www.wolfsonmicro.com/wisce/
0065  */
0066 struct wm8958_mbc_cfg {
0067     const char *name;
0068     u16 cutoff_regs[WM8958_MBC_CUTOFF_REGS];
0069     u16 coeff_regs[WM8958_MBC_COEFF_REGS];
0070
0071     /* Coefficient layout when using MBC+VSS firmware */
0072     u16 combined_regs[WM8958_MBC_COMBINED_REGS];
0073 };
0074
0075 /**
0076  * VSS HPF configurations are specified with a label and two values to
0077  * write.  Configurations are expected to be generated using the
0078  * multiband compressor configuration panel in WISCE - see
0079  * http://www.wolfsonmicro.com/wisce/
0080  */
0081 struct wm8958_vss_hpf_cfg {
0082     const char *name;
0083     u16 regs[WM8958_VSS_HPF_REGS];
0084 };
0085
0086 /**
0087  * VSS configurations are specified with a label and array of values
0088  * to write.  Configurations are expected to be generated using the
0089  * multiband compressor configuration panel in WISCE - see
0090  * http://www.wolfsonmicro.com/wisce/
0091  */
0092 struct wm8958_vss_cfg {
0093     const char *name;
0094     u16 regs[WM8958_VSS_REGS];
0095 };
0096
0097 /**
0098  * Enhanced EQ configurations are specified with a label and array of
0099  * values to write.  Configurations are expected to be generated using
0100  * the multiband compressor configuration panel in WISCE - see
0101  * http://www.wolfsonmicro.com/wisce/
0102  */
0103 struct wm8958_enh_eq_cfg {
0104     const char *name;
0105     u16 regs[WM8958_ENH_EQ_REGS];
0106 };
0107
0108 /**
0109  * Microphone detection rates, used to tune response rates and power
0110  * consumption for WM8958/WM1811 microphone detection.
0111  *
0112  * @sysclk: System clock rate to use this configuration for.
0113  * @idle: True if this configuration should use when no accessory is detected,
0114  *        false otherwise.
0115  * @start: Value for MICD_BIAS_START_TIME register field (not shifted).
0116  * @rate: Value for MICD_RATE register field (not shifted).
0117  */
0118 struct wm8958_micd_rate {
0119     int sysclk;
0120     bool idle;
0121     int start;
0122     int rate;
0123 };
0124
0125 struct wm8994_pdata {
0126     int gpio_base;
0127
0128     /**
0129      * Default values for GPIOs if non-zero, WM8994_CONFIGURE_GPIO
0130      * can be used for all zero values.
0131      */
0132     int gpio_defaults[WM8994_NUM_GPIO];
0133
0134     struct wm8994_ldo_pdata ldo[WM8994_NUM_LDO];
0135
0136     int irq_base;  /** Base IRQ number for WM8994, required for IRQs */
0137     unsigned long irq_flags; /** user irq flags */
0138
0139         int num_drc_cfgs;
0140         struct wm8994_drc_cfg *drc_cfgs;
0141
0142         int num_retune_mobile_cfgs;
0143         struct wm8994_retune_mobile_cfg *retune_mobile_cfgs;
0144
0145     int num_mbc_cfgs;
0146     struct wm8958_mbc_cfg *mbc_cfgs;
0147
0148     int num_vss_cfgs;
0149     struct wm8958_vss_cfg *vss_cfgs;
0150
0151     int num_vss_hpf_cfgs;
0152     struct wm8958_vss_hpf_cfg *vss_hpf_cfgs;
0153
0154     int num_enh_eq_cfgs;
0155     struct wm8958_enh_eq_cfg *enh_eq_cfgs;
0156
0157     int num_micd_rates;
0158     struct wm8958_micd_rate *micd_rates;
0159
0160     /* Power up delays to add after microphone bias power up (ms) */
0161     int micb1_delay;
0162     int micb2_delay;
0163
0164         /* LINEOUT can be differential or single ended */
0165         unsigned int lineout1_diff:1;
0166         unsigned int lineout2_diff:1;
0167
0168         /* Common mode feedback */
0169         unsigned int lineout1fb:1;
0170         unsigned int lineout2fb:1;
0171
0172     /* Delay between detecting a jack and starting microphone
0173      * detect (specified in ms)
0174      */
0175     int micdet_delay;
0176
0177     /* Delay between microphone detect completing and reporting on
0178      * insert (specified in ms)
0179      */
0180     int mic_id_delay;
0181
0182     /* IRQ for microphone detection if brought out directly as a
0183      * signal.
0184      */
0185     int micdet_irq;
0186
0187         /* WM8994 microphone biases: 0=0.9*AVDD1 1=0.65*AVVD1 */
0188         unsigned int micbias1_lvl:1;
0189         unsigned int micbias2_lvl:1;
0190
0191         /* WM8994 jack detect threashold levels, see datasheet for values */
0192         unsigned int jd_scthr:2;
0193         unsigned int jd_thr:2;
0194
0195     /* Configure WM1811 jack detection for use with external capacitor */
0196     unsigned int jd_ext_cap:1;
0197
0198     /* WM8958 microphone bias configuration */
0199     int micbias[2];
0200
0201     /* WM8958 microphone detection ranges */
0202     u16 micd_lvl_sel;
0203
0204     /* Disable the internal pull downs on the LDOs if they are
0205      * always driven (eg, connected to an always on supply or
0206      * GPIO that always drives an output.  If they float power
0207      * consumption will rise.
0208      */
0209     bool ldo_ena_always_driven;
0210
0211     /*
0212      * SPKMODE must be pulled internally by the device on this
0213      * system.
0214      */
0215     bool spkmode_pu;
0216
0217     /*
0218      * CS/ADDR must be pulled internally by the device on this
0219      * system.
0220      */
0221     bool csnaddr_pd;
0222
0223     /**
0224      * Maximum number of channels clocks will be generated for,
0225      * useful for systems where and I2S bus with multiple data
0226      * lines is mastered.
0227      */
0228     int max_channels_clocked[WM8994_NUM_AIF];
0229
0230     /**
0231      * GPIO for the IRQ pin if host only supports edge triggering
0232      */
0233     int irq_gpio;
0234 };
0235
0236 #endif