0001
0002
0003
0004
0005
0006
0007
0008 #ifndef __LINUX_MFD_WM8350_PMIC_H
0009 #define __LINUX_MFD_WM8350_PMIC_H
0010
0011 #include <linux/platform_device.h>
0012 #include <linux/leds.h>
0013 #include <linux/regulator/machine.h>
0014
0015
0016
0017
0018
0019 #define WM8350_CURRENT_SINK_DRIVER_A 0xAC
0020 #define WM8350_CSA_FLASH_CONTROL 0xAD
0021 #define WM8350_CURRENT_SINK_DRIVER_B 0xAE
0022 #define WM8350_CSB_FLASH_CONTROL 0xAF
0023 #define WM8350_DCDC_LDO_REQUESTED 0xB0
0024 #define WM8350_DCDC_ACTIVE_OPTIONS 0xB1
0025 #define WM8350_DCDC_SLEEP_OPTIONS 0xB2
0026 #define WM8350_POWER_CHECK_COMPARATOR 0xB3
0027 #define WM8350_DCDC1_CONTROL 0xB4
0028 #define WM8350_DCDC1_TIMEOUTS 0xB5
0029 #define WM8350_DCDC1_LOW_POWER 0xB6
0030 #define WM8350_DCDC2_CONTROL 0xB7
0031 #define WM8350_DCDC2_TIMEOUTS 0xB8
0032 #define WM8350_DCDC3_CONTROL 0xBA
0033 #define WM8350_DCDC3_TIMEOUTS 0xBB
0034 #define WM8350_DCDC3_LOW_POWER 0xBC
0035 #define WM8350_DCDC4_CONTROL 0xBD
0036 #define WM8350_DCDC4_TIMEOUTS 0xBE
0037 #define WM8350_DCDC4_LOW_POWER 0xBF
0038 #define WM8350_DCDC5_CONTROL 0xC0
0039 #define WM8350_DCDC5_TIMEOUTS 0xC1
0040 #define WM8350_DCDC6_CONTROL 0xC3
0041 #define WM8350_DCDC6_TIMEOUTS 0xC4
0042 #define WM8350_DCDC6_LOW_POWER 0xC5
0043 #define WM8350_LIMIT_SWITCH_CONTROL 0xC7
0044 #define WM8350_LDO1_CONTROL 0xC8
0045 #define WM8350_LDO1_TIMEOUTS 0xC9
0046 #define WM8350_LDO1_LOW_POWER 0xCA
0047 #define WM8350_LDO2_CONTROL 0xCB
0048 #define WM8350_LDO2_TIMEOUTS 0xCC
0049 #define WM8350_LDO2_LOW_POWER 0xCD
0050 #define WM8350_LDO3_CONTROL 0xCE
0051 #define WM8350_LDO3_TIMEOUTS 0xCF
0052 #define WM8350_LDO3_LOW_POWER 0xD0
0053 #define WM8350_LDO4_CONTROL 0xD1
0054 #define WM8350_LDO4_TIMEOUTS 0xD2
0055 #define WM8350_LDO4_LOW_POWER 0xD3
0056 #define WM8350_VCC_FAULT_MASKS 0xD7
0057 #define WM8350_MAIN_BANDGAP_CONTROL 0xD8
0058 #define WM8350_OSC_CONTROL 0xD9
0059 #define WM8350_RTC_TICK_CONTROL 0xDA
0060 #define WM8350_SECURITY 0xDB
0061 #define WM8350_RAM_BIST_1 0xDC
0062 #define WM8350_DCDC_LDO_STATUS 0xE1
0063 #define WM8350_GPIO_PIN_STATUS 0xE6
0064
0065 #define WM8350_DCDC1_FORCE_PWM 0xF8
0066 #define WM8350_DCDC3_FORCE_PWM 0xFA
0067 #define WM8350_DCDC4_FORCE_PWM 0xFB
0068 #define WM8350_DCDC6_FORCE_PWM 0xFD
0069
0070
0071
0072
0073 #define WM8350_CS1_HIB_MODE 0x1000
0074 #define WM8350_CS1_HIB_MODE_MASK 0x1000
0075 #define WM8350_CS1_HIB_MODE_SHIFT 12
0076 #define WM8350_CS1_ISEL_MASK 0x003F
0077 #define WM8350_CS1_ISEL_SHIFT 0
0078
0079
0080 #define WM8350_CS1_HIB_MODE_DISABLE 0
0081 #define WM8350_CS1_HIB_MODE_LEAVE 1
0082
0083 #define WM8350_CS1_ISEL_220M 0x3F
0084
0085
0086
0087
0088 #define WM8350_CS1_FLASH_MODE 0x8000
0089 #define WM8350_CS1_TRIGSRC 0x4000
0090 #define WM8350_CS1_DRIVE 0x2000
0091 #define WM8350_CS1_FLASH_DUR_MASK 0x0300
0092 #define WM8350_CS1_OFF_RAMP_MASK 0x0030
0093 #define WM8350_CS1_ON_RAMP_MASK 0x0003
0094
0095
0096
0097
0098 #define WM8350_CS2_HIB_MODE 0x1000
0099 #define WM8350_CS2_ISEL_MASK 0x003F
0100
0101
0102
0103
0104 #define WM8350_CS2_FLASH_MODE 0x8000
0105 #define WM8350_CS2_TRIGSRC 0x4000
0106 #define WM8350_CS2_DRIVE 0x2000
0107 #define WM8350_CS2_FLASH_DUR_MASK 0x0300
0108 #define WM8350_CS2_OFF_RAMP_MASK 0x0030
0109 #define WM8350_CS2_ON_RAMP_MASK 0x0003
0110
0111
0112
0113
0114 #define WM8350_LS_ENA 0x8000
0115 #define WM8350_LDO4_ENA 0x0800
0116 #define WM8350_LDO3_ENA 0x0400
0117 #define WM8350_LDO2_ENA 0x0200
0118 #define WM8350_LDO1_ENA 0x0100
0119 #define WM8350_DC6_ENA 0x0020
0120 #define WM8350_DC5_ENA 0x0010
0121 #define WM8350_DC4_ENA 0x0008
0122 #define WM8350_DC3_ENA 0x0004
0123 #define WM8350_DC2_ENA 0x0002
0124 #define WM8350_DC1_ENA 0x0001
0125
0126
0127
0128
0129 #define WM8350_PUTO_MASK 0x3000
0130 #define WM8350_PWRUP_DELAY_MASK 0x0300
0131 #define WM8350_DC6_ACTIVE 0x0020
0132 #define WM8350_DC4_ACTIVE 0x0008
0133 #define WM8350_DC3_ACTIVE 0x0004
0134 #define WM8350_DC1_ACTIVE 0x0001
0135
0136
0137
0138
0139 #define WM8350_DC6_SLEEP 0x0020
0140 #define WM8350_DC4_SLEEP 0x0008
0141 #define WM8350_DC3_SLEEP 0x0004
0142 #define WM8350_DC1_SLEEP 0x0001
0143
0144
0145
0146
0147 #define WM8350_PCCMP_ERRACT 0x4000
0148 #define WM8350_PCCMP_RAIL 0x0100
0149 #define WM8350_PCCMP_OFF_THR_MASK 0x0070
0150 #define WM8350_PCCMP_ON_THR_MASK 0x0007
0151
0152
0153
0154
0155 #define WM8350_DC1_OPFLT 0x0400
0156 #define WM8350_DC1_VSEL_MASK 0x007F
0157 #define WM8350_DC1_VSEL_SHIFT 0
0158
0159
0160
0161
0162 #define WM8350_DC1_ERRACT_MASK 0xC000
0163 #define WM8350_DC1_ERRACT_SHIFT 14
0164 #define WM8350_DC1_ENSLOT_MASK 0x3C00
0165 #define WM8350_DC1_ENSLOT_SHIFT 10
0166 #define WM8350_DC1_SDSLOT_MASK 0x03C0
0167 #define WM8350_DC1_UVTO_MASK 0x0030
0168 #define WM8350_DC1_SDSLOT_SHIFT 6
0169
0170
0171 #define WM8350_DC1_ERRACT_NONE 0
0172 #define WM8350_DC1_ERRACT_SHUTDOWN_CONV 1
0173 #define WM8350_DC1_ERRACT_SHUTDOWN_SYS 2
0174
0175
0176
0177
0178 #define WM8350_DC1_HIB_MODE_MASK 0x7000
0179 #define WM8350_DC1_HIB_TRIG_MASK 0x0300
0180 #define WM8350_DC1_VIMG_MASK 0x007F
0181
0182
0183
0184
0185 #define WM8350_DC2_MODE 0x4000
0186 #define WM8350_DC2_MODE_MASK 0x4000
0187 #define WM8350_DC2_MODE_SHIFT 14
0188 #define WM8350_DC2_HIB_MODE 0x1000
0189 #define WM8350_DC2_HIB_MODE_MASK 0x1000
0190 #define WM8350_DC2_HIB_MODE_SHIFT 12
0191 #define WM8350_DC2_HIB_TRIG_MASK 0x0300
0192 #define WM8350_DC2_HIB_TRIG_SHIFT 8
0193 #define WM8350_DC2_ILIM 0x0040
0194 #define WM8350_DC2_ILIM_MASK 0x0040
0195 #define WM8350_DC2_ILIM_SHIFT 6
0196 #define WM8350_DC2_RMP_MASK 0x0018
0197 #define WM8350_DC2_RMP_SHIFT 3
0198 #define WM8350_DC2_FBSRC_MASK 0x0003
0199 #define WM8350_DC2_FBSRC_SHIFT 0
0200
0201
0202 #define WM8350_DC2_MODE_BOOST 0
0203 #define WM8350_DC2_MODE_SWITCH 1
0204
0205 #define WM8350_DC2_HIB_MODE_ACTIVE 1
0206 #define WM8350_DC2_HIB_MODE_DISABLE 0
0207
0208 #define WM8350_DC2_HIB_TRIG_NONE 0
0209 #define WM8350_DC2_HIB_TRIG_LPWR1 1
0210 #define WM8350_DC2_HIB_TRIG_LPWR2 2
0211 #define WM8350_DC2_HIB_TRIG_LPWR3 3
0212
0213 #define WM8350_DC2_ILIM_HIGH 0
0214 #define WM8350_DC2_ILIM_LOW 1
0215
0216 #define WM8350_DC2_RMP_30V 0
0217 #define WM8350_DC2_RMP_20V 1
0218 #define WM8350_DC2_RMP_10V 2
0219 #define WM8350_DC2_RMP_5V 3
0220
0221 #define WM8350_DC2_FBSRC_FB2 0
0222 #define WM8350_DC2_FBSRC_ISINKA 1
0223 #define WM8350_DC2_FBSRC_ISINKB 2
0224 #define WM8350_DC2_FBSRC_USB 3
0225
0226
0227
0228
0229 #define WM8350_DC2_ERRACT_MASK 0xC000
0230 #define WM8350_DC2_ERRACT_SHIFT 14
0231 #define WM8350_DC2_ENSLOT_MASK 0x3C00
0232 #define WM8350_DC2_ENSLOT_SHIFT 10
0233 #define WM8350_DC2_SDSLOT_MASK 0x03C0
0234 #define WM8350_DC2_UVTO_MASK 0x0030
0235
0236
0237 #define WM8350_DC2_ERRACT_NONE 0
0238 #define WM8350_DC2_ERRACT_SHUTDOWN_CONV 1
0239 #define WM8350_DC2_ERRACT_SHUTDOWN_SYS 2
0240
0241
0242
0243
0244 #define WM8350_DC3_OPFLT 0x0400
0245 #define WM8350_DC3_VSEL_MASK 0x007F
0246 #define WM8350_DC3_VSEL_SHIFT 0
0247
0248
0249
0250
0251 #define WM8350_DC3_ERRACT_MASK 0xC000
0252 #define WM8350_DC3_ERRACT_SHIFT 14
0253 #define WM8350_DC3_ENSLOT_MASK 0x3C00
0254 #define WM8350_DC3_ENSLOT_SHIFT 10
0255 #define WM8350_DC3_SDSLOT_MASK 0x03C0
0256 #define WM8350_DC3_UVTO_MASK 0x0030
0257 #define WM8350_DC3_SDSLOT_SHIFT 6
0258
0259
0260 #define WM8350_DC3_ERRACT_NONE 0
0261 #define WM8350_DC3_ERRACT_SHUTDOWN_CONV 1
0262 #define WM8350_DC3_ERRACT_SHUTDOWN_SYS 2
0263
0264
0265
0266 #define WM8350_DC3_HIB_MODE_MASK 0x7000
0267 #define WM8350_DC3_HIB_TRIG_MASK 0x0300
0268 #define WM8350_DC3_VIMG_MASK 0x007F
0269
0270
0271
0272
0273 #define WM8350_DC4_OPFLT 0x0400
0274 #define WM8350_DC4_VSEL_MASK 0x007F
0275 #define WM8350_DC4_VSEL_SHIFT 0
0276
0277
0278
0279
0280 #define WM8350_DC4_ERRACT_MASK 0xC000
0281 #define WM8350_DC4_ERRACT_SHIFT 14
0282 #define WM8350_DC4_ENSLOT_MASK 0x3C00
0283 #define WM8350_DC4_ENSLOT_SHIFT 10
0284 #define WM8350_DC4_SDSLOT_MASK 0x03C0
0285 #define WM8350_DC4_UVTO_MASK 0x0030
0286 #define WM8350_DC4_SDSLOT_SHIFT 6
0287
0288
0289 #define WM8350_DC4_ERRACT_NONE 0
0290 #define WM8350_DC4_ERRACT_SHUTDOWN_CONV 1
0291 #define WM8350_DC4_ERRACT_SHUTDOWN_SYS 2
0292
0293
0294
0295
0296 #define WM8350_DC4_HIB_MODE_MASK 0x7000
0297 #define WM8350_DC4_HIB_TRIG_MASK 0x0300
0298 #define WM8350_DC4_VIMG_MASK 0x007F
0299
0300
0301
0302
0303 #define WM8350_DC5_MODE 0x4000
0304 #define WM8350_DC5_MODE_MASK 0x4000
0305 #define WM8350_DC5_MODE_SHIFT 14
0306 #define WM8350_DC5_HIB_MODE 0x1000
0307 #define WM8350_DC5_HIB_MODE_MASK 0x1000
0308 #define WM8350_DC5_HIB_MODE_SHIFT 12
0309 #define WM8350_DC5_HIB_TRIG_MASK 0x0300
0310 #define WM8350_DC5_HIB_TRIG_SHIFT 8
0311 #define WM8350_DC5_ILIM 0x0040
0312 #define WM8350_DC5_ILIM_MASK 0x0040
0313 #define WM8350_DC5_ILIM_SHIFT 6
0314 #define WM8350_DC5_RMP_MASK 0x0018
0315 #define WM8350_DC5_RMP_SHIFT 3
0316 #define WM8350_DC5_FBSRC_MASK 0x0003
0317 #define WM8350_DC5_FBSRC_SHIFT 0
0318
0319
0320 #define WM8350_DC5_MODE_BOOST 0
0321 #define WM8350_DC5_MODE_SWITCH 1
0322
0323 #define WM8350_DC5_HIB_MODE_ACTIVE 1
0324 #define WM8350_DC5_HIB_MODE_DISABLE 0
0325
0326 #define WM8350_DC5_HIB_TRIG_NONE 0
0327 #define WM8350_DC5_HIB_TRIG_LPWR1 1
0328 #define WM8350_DC5_HIB_TRIG_LPWR2 2
0329 #define WM8350_DC5_HIB_TRIG_LPWR3 3
0330
0331 #define WM8350_DC5_ILIM_HIGH 0
0332 #define WM8350_DC5_ILIM_LOW 1
0333
0334 #define WM8350_DC5_RMP_30V 0
0335 #define WM8350_DC5_RMP_20V 1
0336 #define WM8350_DC5_RMP_10V 2
0337 #define WM8350_DC5_RMP_5V 3
0338
0339 #define WM8350_DC5_FBSRC_FB2 0
0340 #define WM8350_DC5_FBSRC_ISINKA 1
0341 #define WM8350_DC5_FBSRC_ISINKB 2
0342 #define WM8350_DC5_FBSRC_USB 3
0343
0344
0345
0346
0347 #define WM8350_DC5_ERRACT_MASK 0xC000
0348 #define WM8350_DC5_ERRACT_SHIFT 14
0349 #define WM8350_DC5_ENSLOT_MASK 0x3C00
0350 #define WM8350_DC5_ENSLOT_SHIFT 10
0351 #define WM8350_DC5_SDSLOT_MASK 0x03C0
0352 #define WM8350_DC5_UVTO_MASK 0x0030
0353 #define WM8350_DC5_SDSLOT_SHIFT 6
0354
0355
0356 #define WM8350_DC5_ERRACT_NONE 0
0357 #define WM8350_DC5_ERRACT_SHUTDOWN_CONV 1
0358 #define WM8350_DC5_ERRACT_SHUTDOWN_SYS 2
0359
0360
0361
0362
0363 #define WM8350_DC6_OPFLT 0x0400
0364 #define WM8350_DC6_VSEL_MASK 0x007F
0365 #define WM8350_DC6_VSEL_SHIFT 0
0366
0367
0368
0369
0370 #define WM8350_DC6_ERRACT_MASK 0xC000
0371 #define WM8350_DC6_ERRACT_SHIFT 14
0372 #define WM8350_DC6_ENSLOT_MASK 0x3C00
0373 #define WM8350_DC6_ENSLOT_SHIFT 10
0374 #define WM8350_DC6_SDSLOT_MASK 0x03C0
0375 #define WM8350_DC6_UVTO_MASK 0x0030
0376 #define WM8350_DC6_SDSLOT_SHIFT 6
0377
0378
0379 #define WM8350_DC6_ERRACT_NONE 0
0380 #define WM8350_DC6_ERRACT_SHUTDOWN_CONV 1
0381 #define WM8350_DC6_ERRACT_SHUTDOWN_SYS 2
0382
0383
0384
0385
0386 #define WM8350_DC6_HIB_MODE_MASK 0x7000
0387 #define WM8350_DC6_HIB_TRIG_MASK 0x0300
0388 #define WM8350_DC6_VIMG_MASK 0x007F
0389
0390
0391
0392
0393 #define WM8350_LS_ERRACT_MASK 0xC000
0394 #define WM8350_LS_ERRACT_SHIFT 14
0395 #define WM8350_LS_ENSLOT_MASK 0x3C00
0396 #define WM8350_LS_ENSLOT_SHIFT 10
0397 #define WM8350_LS_SDSLOT_MASK 0x03C0
0398 #define WM8350_LS_SDSLOT_SHIFT 6
0399 #define WM8350_LS_HIB_MODE 0x0010
0400 #define WM8350_LS_HIB_MODE_MASK 0x0010
0401 #define WM8350_LS_HIB_MODE_SHIFT 4
0402 #define WM8350_LS_HIB_PROT 0x0002
0403 #define WM8350_LS_HIB_PROT_MASK 0x0002
0404 #define WM8350_LS_HIB_PROT_SHIFT 1
0405 #define WM8350_LS_PROT 0x0001
0406 #define WM8350_LS_PROT_MASK 0x0001
0407 #define WM8350_LS_PROT_SHIFT 0
0408
0409
0410 #define WM8350_LS_ERRACT_NONE 0
0411 #define WM8350_LS_ERRACT_SHUTDOWN_CONV 1
0412 #define WM8350_LS_ERRACT_SHUTDOWN_SYS 2
0413
0414
0415
0416
0417 #define WM8350_LDO1_SWI 0x4000
0418 #define WM8350_LDO1_OPFLT 0x0400
0419 #define WM8350_LDO1_VSEL_MASK 0x001F
0420 #define WM8350_LDO1_VSEL_SHIFT 0
0421
0422
0423
0424
0425 #define WM8350_LDO1_ERRACT_MASK 0xC000
0426 #define WM8350_LDO1_ERRACT_SHIFT 14
0427 #define WM8350_LDO1_ENSLOT_MASK 0x3C00
0428 #define WM8350_LDO1_ENSLOT_SHIFT 10
0429 #define WM8350_LDO1_SDSLOT_MASK 0x03C0
0430 #define WM8350_LDO1_UVTO_MASK 0x0030
0431 #define WM8350_LDO1_SDSLOT_SHIFT 6
0432
0433
0434 #define WM8350_LDO1_ERRACT_NONE 0
0435 #define WM8350_LDO1_ERRACT_SHUTDOWN_CONV 1
0436 #define WM8350_LDO1_ERRACT_SHUTDOWN_SYS 2
0437
0438
0439
0440
0441 #define WM8350_LDO1_HIB_MODE_MASK 0x3000
0442 #define WM8350_LDO1_HIB_TRIG_MASK 0x0300
0443 #define WM8350_LDO1_VIMG_MASK 0x001F
0444 #define WM8350_LDO1_HIB_MODE_DIS (0x1 << 12)
0445
0446
0447
0448
0449
0450 #define WM8350_LDO2_SWI 0x4000
0451 #define WM8350_LDO2_OPFLT 0x0400
0452 #define WM8350_LDO2_VSEL_MASK 0x001F
0453 #define WM8350_LDO2_VSEL_SHIFT 0
0454
0455
0456
0457
0458 #define WM8350_LDO2_ERRACT_MASK 0xC000
0459 #define WM8350_LDO2_ERRACT_SHIFT 14
0460 #define WM8350_LDO2_ENSLOT_MASK 0x3C00
0461 #define WM8350_LDO2_ENSLOT_SHIFT 10
0462 #define WM8350_LDO2_SDSLOT_MASK 0x03C0
0463 #define WM8350_LDO2_SDSLOT_SHIFT 6
0464
0465
0466 #define WM8350_LDO2_ERRACT_NONE 0
0467 #define WM8350_LDO2_ERRACT_SHUTDOWN_CONV 1
0468 #define WM8350_LDO2_ERRACT_SHUTDOWN_SYS 2
0469
0470
0471
0472
0473 #define WM8350_LDO2_HIB_MODE_MASK 0x3000
0474 #define WM8350_LDO2_HIB_TRIG_MASK 0x0300
0475 #define WM8350_LDO2_VIMG_MASK 0x001F
0476
0477
0478
0479
0480 #define WM8350_LDO3_SWI 0x4000
0481 #define WM8350_LDO3_OPFLT 0x0400
0482 #define WM8350_LDO3_VSEL_MASK 0x001F
0483 #define WM8350_LDO3_VSEL_SHIFT 0
0484
0485
0486
0487
0488 #define WM8350_LDO3_ERRACT_MASK 0xC000
0489 #define WM8350_LDO3_ERRACT_SHIFT 14
0490 #define WM8350_LDO3_ENSLOT_MASK 0x3C00
0491 #define WM8350_LDO3_ENSLOT_SHIFT 10
0492 #define WM8350_LDO3_SDSLOT_MASK 0x03C0
0493 #define WM8350_LDO3_UVTO_MASK 0x0030
0494 #define WM8350_LDO3_SDSLOT_SHIFT 6
0495
0496
0497 #define WM8350_LDO3_ERRACT_NONE 0
0498 #define WM8350_LDO3_ERRACT_SHUTDOWN_CONV 1
0499 #define WM8350_LDO3_ERRACT_SHUTDOWN_SYS 2
0500
0501
0502
0503
0504 #define WM8350_LDO3_HIB_MODE_MASK 0x3000
0505 #define WM8350_LDO3_HIB_TRIG_MASK 0x0300
0506 #define WM8350_LDO3_VIMG_MASK 0x001F
0507
0508
0509
0510
0511 #define WM8350_LDO4_SWI 0x4000
0512 #define WM8350_LDO4_OPFLT 0x0400
0513 #define WM8350_LDO4_VSEL_MASK 0x001F
0514 #define WM8350_LDO4_VSEL_SHIFT 0
0515
0516
0517
0518
0519 #define WM8350_LDO4_ERRACT_MASK 0xC000
0520 #define WM8350_LDO4_ERRACT_SHIFT 14
0521 #define WM8350_LDO4_ENSLOT_MASK 0x3C00
0522 #define WM8350_LDO4_ENSLOT_SHIFT 10
0523 #define WM8350_LDO4_SDSLOT_MASK 0x03C0
0524 #define WM8350_LDO4_UVTO_MASK 0x0030
0525 #define WM8350_LDO4_SDSLOT_SHIFT 6
0526
0527
0528 #define WM8350_LDO4_ERRACT_NONE 0
0529 #define WM8350_LDO4_ERRACT_SHUTDOWN_CONV 1
0530 #define WM8350_LDO4_ERRACT_SHUTDOWN_SYS 2
0531
0532
0533
0534
0535 #define WM8350_LDO4_HIB_MODE_MASK 0x3000
0536 #define WM8350_LDO4_HIB_TRIG_MASK 0x0300
0537 #define WM8350_LDO4_VIMG_MASK 0x001F
0538
0539
0540
0541
0542 #define WM8350_LS_FAULT 0x8000
0543 #define WM8350_LDO4_FAULT 0x0800
0544 #define WM8350_LDO3_FAULT 0x0400
0545 #define WM8350_LDO2_FAULT 0x0200
0546 #define WM8350_LDO1_FAULT 0x0100
0547 #define WM8350_DC6_FAULT 0x0020
0548 #define WM8350_DC5_FAULT 0x0010
0549 #define WM8350_DC4_FAULT 0x0008
0550 #define WM8350_DC3_FAULT 0x0004
0551 #define WM8350_DC2_FAULT 0x0002
0552 #define WM8350_DC1_FAULT 0x0001
0553
0554
0555
0556
0557 #define WM8350_MBG_LOAD_FUSES 0x8000
0558 #define WM8350_MBG_FUSE_WPREP 0x4000
0559 #define WM8350_MBG_FUSE_WRITE 0x2000
0560 #define WM8350_MBG_FUSE_TRIM_MASK 0x1F00
0561 #define WM8350_MBG_TRIM_SRC 0x0020
0562 #define WM8350_MBG_USER_TRIM_MASK 0x001F
0563
0564
0565
0566
0567 #define WM8350_OSC_LOAD_FUSES 0x8000
0568 #define WM8350_OSC_FUSE_WPREP 0x4000
0569 #define WM8350_OSC_FUSE_WRITE 0x2000
0570 #define WM8350_OSC_FUSE_TRIM_MASK 0x0F00
0571 #define WM8350_OSC_TRIM_SRC 0x0020
0572 #define WM8350_OSC_USER_TRIM_MASK 0x000F
0573
0574
0575
0576
0577 #define WM8350_DCDC1_FORCE_PWM_ENA 0x0010
0578
0579
0580
0581
0582 #define WM8350_DCDC3_FORCE_PWM_ENA 0x0010
0583
0584
0585
0586
0587 #define WM8350_DCDC4_FORCE_PWM_ENA 0x0010
0588
0589
0590
0591
0592 #define WM8350_DCDC6_FORCE_PWM_ENA 0x0010
0593
0594
0595
0596
0597 #define WM8350_DCDC_1 0
0598 #define WM8350_DCDC_2 1
0599 #define WM8350_DCDC_3 2
0600 #define WM8350_DCDC_4 3
0601 #define WM8350_DCDC_5 4
0602 #define WM8350_DCDC_6 5
0603
0604
0605 #define WM8350_DCDC_ACTIVE_STANDBY 0
0606 #define WM8350_DCDC_ACTIVE_PULSE 1
0607 #define WM8350_DCDC_SLEEP_NORMAL 0
0608 #define WM8350_DCDC_SLEEP_LOW 1
0609
0610
0611 #define WM8350_DCDC_HIB_MODE_CUR (0 << 12)
0612 #define WM8350_DCDC_HIB_MODE_IMAGE (1 << 12)
0613 #define WM8350_DCDC_HIB_MODE_STANDBY (2 << 12)
0614 #define WM8350_DCDC_HIB_MODE_LDO (4 << 12)
0615 #define WM8350_DCDC_HIB_MODE_LDO_IM (5 << 12)
0616 #define WM8350_DCDC_HIB_MODE_DIS (7 << 12)
0617 #define WM8350_DCDC_HIB_MODE_MASK (7 << 12)
0618
0619
0620 #define WM8350_DCDC_HIB_SIG_REG (0 << 8)
0621 #define WM8350_DCDC_HIB_SIG_LPWR1 (1 << 8)
0622 #define WM8350_DCDC_HIB_SIG_LPWR2 (2 << 8)
0623 #define WM8350_DCDC_HIB_SIG_LPWR3 (3 << 8)
0624
0625
0626 #define WM8350_LDO_HIB_MODE_IMAGE (0 << 0)
0627 #define WM8350_LDO_HIB_MODE_DIS (1 << 0)
0628
0629
0630 #define WM8350_LDO_HIB_SIG_REG (0 << 8)
0631 #define WM8350_LDO_HIB_SIG_LPWR1 (1 << 8)
0632 #define WM8350_LDO_HIB_SIG_LPWR2 (2 << 8)
0633 #define WM8350_LDO_HIB_SIG_LPWR3 (3 << 8)
0634
0635
0636
0637
0638 #define WM8350_LDO_1 6
0639 #define WM8350_LDO_2 7
0640 #define WM8350_LDO_3 8
0641 #define WM8350_LDO_4 9
0642
0643
0644
0645
0646 #define WM8350_ISINK_A 10
0647 #define WM8350_ISINK_B 11
0648
0649 #define WM8350_ISINK_MODE_BOOST 0
0650 #define WM8350_ISINK_MODE_SWITCH 1
0651 #define WM8350_ISINK_ILIM_NORMAL 0
0652 #define WM8350_ISINK_ILIM_LOW 1
0653
0654 #define WM8350_ISINK_FLASH_DISABLE 0
0655 #define WM8350_ISINK_FLASH_ENABLE 1
0656 #define WM8350_ISINK_FLASH_TRIG_BIT 0
0657 #define WM8350_ISINK_FLASH_TRIG_GPIO 1
0658 #define WM8350_ISINK_FLASH_MODE_EN (1 << 13)
0659 #define WM8350_ISINK_FLASH_MODE_DIS (0 << 13)
0660 #define WM8350_ISINK_FLASH_DUR_32MS (0 << 8)
0661 #define WM8350_ISINK_FLASH_DUR_64MS (1 << 8)
0662 #define WM8350_ISINK_FLASH_DUR_96MS (2 << 8)
0663 #define WM8350_ISINK_FLASH_DUR_1024MS (3 << 8)
0664 #define WM8350_ISINK_FLASH_ON_INSTANT (0 << 0)
0665 #define WM8350_ISINK_FLASH_ON_0_25S (1 << 0)
0666 #define WM8350_ISINK_FLASH_ON_0_50S (2 << 0)
0667 #define WM8350_ISINK_FLASH_ON_1_00S (3 << 0)
0668 #define WM8350_ISINK_FLASH_ON_1_95S (1 << 0)
0669 #define WM8350_ISINK_FLASH_ON_3_91S (2 << 0)
0670 #define WM8350_ISINK_FLASH_ON_7_80S (3 << 0)
0671 #define WM8350_ISINK_FLASH_OFF_INSTANT (0 << 4)
0672 #define WM8350_ISINK_FLASH_OFF_0_25S (1 << 4)
0673 #define WM8350_ISINK_FLASH_OFF_0_50S (2 << 4)
0674 #define WM8350_ISINK_FLASH_OFF_1_00S (3 << 4)
0675 #define WM8350_ISINK_FLASH_OFF_1_95S (1 << 4)
0676 #define WM8350_ISINK_FLASH_OFF_3_91S (2 << 4)
0677 #define WM8350_ISINK_FLASH_OFF_7_80S (3 << 4)
0678
0679
0680
0681
0682 #define WM8350_IRQ_CS1 13
0683 #define WM8350_IRQ_CS2 14
0684 #define WM8350_IRQ_UV_LDO4 25
0685 #define WM8350_IRQ_UV_LDO3 26
0686 #define WM8350_IRQ_UV_LDO2 27
0687 #define WM8350_IRQ_UV_LDO1 28
0688 #define WM8350_IRQ_UV_DC6 29
0689 #define WM8350_IRQ_UV_DC5 30
0690 #define WM8350_IRQ_UV_DC4 31
0691 #define WM8350_IRQ_UV_DC3 32
0692 #define WM8350_IRQ_UV_DC2 33
0693 #define WM8350_IRQ_UV_DC1 34
0694 #define WM8350_IRQ_OC_LS 35
0695
0696 #define NUM_WM8350_REGULATORS 12
0697
0698 struct wm8350;
0699 struct platform_device;
0700 struct regulator_init_data;
0701
0702
0703
0704
0705 struct wm8350_led_platform_data {
0706 const char *name;
0707 const char *default_trigger;
0708 int max_uA;
0709 };
0710
0711 struct wm8350_led {
0712 struct platform_device *pdev;
0713 struct work_struct work;
0714 spinlock_t value_lock;
0715 enum led_brightness value;
0716 struct led_classdev cdev;
0717 int max_uA_index;
0718 int enabled;
0719
0720 struct regulator *isink;
0721 struct regulator_consumer_supply isink_consumer;
0722 struct regulator_init_data isink_init;
0723 struct regulator *dcdc;
0724 struct regulator_consumer_supply dcdc_consumer;
0725 struct regulator_init_data dcdc_init;
0726 };
0727
0728 struct wm8350_pmic {
0729
0730 int max_dcdc;
0731 int max_isink;
0732
0733
0734 int isink_A_dcdc;
0735 int isink_B_dcdc;
0736
0737
0738 u16 dcdc1_hib_mode;
0739 u16 dcdc3_hib_mode;
0740 u16 dcdc4_hib_mode;
0741 u16 dcdc6_hib_mode;
0742
0743
0744 struct platform_device *pdev[NUM_WM8350_REGULATORS];
0745
0746
0747 struct wm8350_led led[2];
0748 };
0749
0750 int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
0751 struct regulator_init_data *initdata);
0752 int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
0753 struct wm8350_led_platform_data *pdata);
0754
0755
0756
0757
0758 int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
0759 u16 stop, u16 fault);
0760 int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
0761 u16 ilim, u16 ramp, u16 feedback);
0762
0763
0764
0765
0766 int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop);
0767
0768
0769
0770
0771 int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode,
0772 u16 trigger, u16 duration, u16 on_ramp,
0773 u16 off_ramp, u16 drive);
0774
0775 #endif