linux/mfd/twl6040.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * MFD driver for twl6040
0004  *
0005  * Authors:     Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
0006  *              Misael Lopez Cruz <misael.lopez@ti.com>
0007  *
0008  * Copyright:   (C) 2011 Texas Instruments, Inc.
0009  */
0010
0011 #ifndef __TWL6040_CODEC_H__
0012 #define __TWL6040_CODEC_H__
0013
0014 #include <linux/interrupt.h>
0015 #include <linux/mfd/core.h>
0016 #include <linux/regulator/consumer.h>
0017 #include <linux/clk.h>
0018
0019 #define TWL6040_REG_ASICID      0x01
0020 #define TWL6040_REG_ASICREV     0x02
0021 #define TWL6040_REG_INTID       0x03
0022 #define TWL6040_REG_INTMR       0x04
0023 #define TWL6040_REG_NCPCTL      0x05
0024 #define TWL6040_REG_LDOCTL      0x06
0025 #define TWL6040_REG_HPPLLCTL        0x07
0026 #define TWL6040_REG_LPPLLCTL        0x08
0027 #define TWL6040_REG_LPPLLDIV        0x09
0028 #define TWL6040_REG_AMICBCTL        0x0A
0029 #define TWL6040_REG_DMICBCTL        0x0B
0030 #define TWL6040_REG_MICLCTL     0x0C
0031 #define TWL6040_REG_MICRCTL     0x0D
0032 #define TWL6040_REG_MICGAIN     0x0E
0033 #define TWL6040_REG_LINEGAIN        0x0F
0034 #define TWL6040_REG_HSLCTL      0x10
0035 #define TWL6040_REG_HSRCTL      0x11
0036 #define TWL6040_REG_HSGAIN      0x12
0037 #define TWL6040_REG_EARCTL      0x13
0038 #define TWL6040_REG_HFLCTL      0x14
0039 #define TWL6040_REG_HFLGAIN     0x15
0040 #define TWL6040_REG_HFRCTL      0x16
0041 #define TWL6040_REG_HFRGAIN     0x17
0042 #define TWL6040_REG_VIBCTLL     0x18
0043 #define TWL6040_REG_VIBDATL     0x19
0044 #define TWL6040_REG_VIBCTLR     0x1A
0045 #define TWL6040_REG_VIBDATR     0x1B
0046 #define TWL6040_REG_HKCTL1      0x1C
0047 #define TWL6040_REG_HKCTL2      0x1D
0048 #define TWL6040_REG_GPOCTL      0x1E
0049 #define TWL6040_REG_ALB         0x1F
0050 #define TWL6040_REG_DLB         0x20
0051 #define TWL6040_REG_TRIM1       0x28
0052 #define TWL6040_REG_TRIM2       0x29
0053 #define TWL6040_REG_TRIM3       0x2A
0054 #define TWL6040_REG_HSOTRIM     0x2B
0055 #define TWL6040_REG_HFOTRIM     0x2C
0056 #define TWL6040_REG_ACCCTL      0x2D
0057 #define TWL6040_REG_STATUS      0x2E
0058
0059 /* INTID (0x03) fields */
0060
0061 #define TWL6040_THINT           0x01
0062 #define TWL6040_PLUGINT         0x02
0063 #define TWL6040_UNPLUGINT       0x04
0064 #define TWL6040_HOOKINT         0x08
0065 #define TWL6040_HFINT           0x10
0066 #define TWL6040_VIBINT          0x20
0067 #define TWL6040_READYINT        0x40
0068
0069 /* INTMR (0x04) fields */
0070
0071 #define TWL6040_THMSK           0x01
0072 #define TWL6040_PLUGMSK         0x02
0073 #define TWL6040_HOOKMSK         0x08
0074 #define TWL6040_HFMSK           0x10
0075 #define TWL6040_VIBMSK          0x20
0076 #define TWL6040_READYMSK        0x40
0077 #define TWL6040_ALLINT_MSK      0x7B
0078
0079 /* NCPCTL (0x05) fields */
0080
0081 #define TWL6040_NCPENA          0x01
0082 #define TWL6040_NCPOPEN         0x40
0083
0084 /* LDOCTL (0x06) fields */
0085
0086 #define TWL6040_LSLDOENA        0x01
0087 #define TWL6040_HSLDOENA        0x04
0088 #define TWL6040_REFENA          0x40
0089 #define TWL6040_OSCENA          0x80
0090
0091 /* HPPLLCTL (0x07) fields */
0092
0093 #define TWL6040_HPLLENA         0x01
0094 #define TWL6040_HPLLRST         0x02
0095 #define TWL6040_HPLLBP          0x04
0096 #define TWL6040_HPLLSQRENA      0x08
0097 #define TWL6040_MCLK_12000KHZ       (0 << 5)
0098 #define TWL6040_MCLK_19200KHZ       (1 << 5)
0099 #define TWL6040_MCLK_26000KHZ       (2 << 5)
0100 #define TWL6040_MCLK_38400KHZ       (3 << 5)
0101 #define TWL6040_MCLK_MSK        0x60
0102
0103 /* LPPLLCTL (0x08) fields */
0104
0105 #define TWL6040_LPLLENA         0x01
0106 #define TWL6040_LPLLRST         0x02
0107 #define TWL6040_LPLLSEL         0x04
0108 #define TWL6040_LPLLFIN         0x08
0109 #define TWL6040_HPLLSEL         0x10
0110
0111 /* HSLCTL/R (0x10/0x11) fields */
0112
0113 #define TWL6040_HSDACENA        (1 << 0)
0114 #define TWL6040_HSDACMODE       (1 << 1)
0115 #define TWL6040_HSDRVENA        (1 << 2)
0116 #define TWL6040_HSDRVMODE       (1 << 3)
0117
0118 /* HFLCTL/R (0x14/0x16) fields */
0119
0120 #define TWL6040_HFDACENA        (1 << 0)
0121 #define TWL6040_HFPGAENA        (1 << 1)
0122 #define TWL6040_HFDRVENA        (1 << 4)
0123 #define TWL6040_HFSWENA         (1 << 6)
0124
0125 /* VIBCTLL/R (0x18/0x1A) fields */
0126
0127 #define TWL6040_VIBENA          (1 << 0)
0128 #define TWL6040_VIBSEL          (1 << 1)
0129 #define TWL6040_VIBCTRL         (1 << 2)
0130 #define TWL6040_VIBCTRL_P       (1 << 3)
0131 #define TWL6040_VIBCTRL_N       (1 << 4)
0132
0133 /* VIBDATL/R (0x19/0x1B) fields */
0134
0135 #define TWL6040_VIBDAT_MAX      0x64
0136
0137 /* GPOCTL (0x1E) fields */
0138
0139 #define TWL6040_GPO1            0x01
0140 #define TWL6040_GPO2            0x02
0141 #define TWL6040_GPO3            0x04
0142
0143 /* ACCCTL (0x2D) fields */
0144
0145 #define TWL6040_I2CSEL          0x01
0146 #define TWL6040_RESETSPLIT      0x04
0147 #define TWL6040_INTCLRMODE      0x08
0148 #define TWL6040_I2CMODE(x)      ((x & 0x3) << 4)
0149
0150 /* STATUS (0x2E) fields */
0151
0152 #define TWL6040_PLUGCOMP        0x02
0153 #define TWL6040_VIBLOCDET       0x10
0154 #define TWL6040_VIBROCDET       0x20
0155 #define TWL6040_TSHUTDET                0x40
0156
0157 #define TWL6040_CELLS           4
0158
0159 #define TWL6040_REV_ES1_0       0x00
0160 #define TWL6040_REV_ES1_1       0x01 /* Rev ES1.1 and ES1.2 */
0161 #define TWL6040_REV_ES1_3       0x02
0162 #define TWL6041_REV_ES2_0       0x10
0163
0164 #define TWL6040_IRQ_TH          0
0165 #define TWL6040_IRQ_PLUG        1
0166 #define TWL6040_IRQ_HOOK        2
0167 #define TWL6040_IRQ_HF          3
0168 #define TWL6040_IRQ_VIB         4
0169 #define TWL6040_IRQ_READY       5
0170
0171 /* PLL selection */
0172 #define TWL6040_SYSCLK_SEL_LPPLL    0
0173 #define TWL6040_SYSCLK_SEL_HPPLL    1
0174
0175 #define TWL6040_GPO_MAX 3
0176
0177 /* TODO: All platform data struct can be removed */
0178 struct twl6040_codec_data {
0179     u16 hs_left_step;
0180     u16 hs_right_step;
0181     u16 hf_left_step;
0182     u16 hf_right_step;
0183 };
0184
0185 struct twl6040_vibra_data {
0186     unsigned int vibldrv_res;   /* left driver resistance */
0187     unsigned int vibrdrv_res;   /* right driver resistance */
0188     unsigned int viblmotor_res; /* left motor resistance */
0189     unsigned int vibrmotor_res; /* right motor resistance */
0190     int vddvibl_uV;         /* VDDVIBL volt, set 0 for fixed reg */
0191     int vddvibr_uV;         /* VDDVIBR volt, set 0 for fixed reg */
0192 };
0193
0194 struct twl6040_gpo_data {
0195     int gpio_base;
0196 };
0197
0198 struct twl6040_platform_data {
0199     int audpwron_gpio;  /* audio power-on gpio */
0200
0201     struct twl6040_codec_data *codec;
0202     struct twl6040_vibra_data *vibra;
0203     struct twl6040_gpo_data *gpo;
0204 };
0205
0206 struct regmap;
0207 struct regmap_irq_chips_data;
0208
0209 struct twl6040 {
0210     struct device *dev;
0211     struct regmap *regmap;
0212     struct regmap_irq_chip_data *irq_data;
0213     struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
0214     struct clk *clk32k;
0215     struct clk *mclk;
0216     struct mutex mutex;
0217     struct mutex irq_mutex;
0218     struct mfd_cell cells[TWL6040_CELLS];
0219     struct completion ready;
0220
0221     int audpwron;
0222     int power_count;
0223     int rev;
0224
0225     /* PLL configuration */
0226     int pll;
0227     unsigned int sysclk_rate;
0228     unsigned int mclk_rate;
0229
0230     unsigned int irq;
0231     unsigned int irq_ready;
0232     unsigned int irq_th;
0233 };
0234
0235 int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg);
0236 int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg,
0237               u8 val);
0238 int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg,
0239              u8 mask);
0240 int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg,
0241                u8 mask);
0242 int twl6040_power(struct twl6040 *twl6040, int on);
0243 int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
0244             unsigned int freq_in, unsigned int freq_out);
0245 int twl6040_get_pll(struct twl6040 *twl6040);
0246 unsigned int twl6040_get_sysclk(struct twl6040 *twl6040);
0247
0248 /* Get the combined status of the vibra control register */
0249 int twl6040_get_vibralr_status(struct twl6040 *twl6040);
0250
0251 static inline int twl6040_get_revid(struct twl6040 *twl6040)
0252 {
0253     return twl6040->rev;
0254 }
0255
0256
0257 #endif  /* End of __TWL6040_CODEC_H__ */