linux/mfd/tps65090.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Core driver interface for TI TPS65090 PMIC family
0004  *
0005  * Copyright (C) 2012 NVIDIA Corporation
0006  */
0007
0008 #ifndef __LINUX_MFD_TPS65090_H
0009 #define __LINUX_MFD_TPS65090_H
0010
0011 #include <linux/irq.h>
0012 #include <linux/regmap.h>
0013
0014 /* TPS65090 IRQs */
0015 enum {
0016     TPS65090_IRQ_INTERRUPT,
0017     TPS65090_IRQ_VAC_STATUS_CHANGE,
0018     TPS65090_IRQ_VSYS_STATUS_CHANGE,
0019     TPS65090_IRQ_BAT_STATUS_CHANGE,
0020     TPS65090_IRQ_CHARGING_STATUS_CHANGE,
0021     TPS65090_IRQ_CHARGING_COMPLETE,
0022     TPS65090_IRQ_OVERLOAD_DCDC1,
0023     TPS65090_IRQ_OVERLOAD_DCDC2,
0024     TPS65090_IRQ_OVERLOAD_DCDC3,
0025     TPS65090_IRQ_OVERLOAD_FET1,
0026     TPS65090_IRQ_OVERLOAD_FET2,
0027     TPS65090_IRQ_OVERLOAD_FET3,
0028     TPS65090_IRQ_OVERLOAD_FET4,
0029     TPS65090_IRQ_OVERLOAD_FET5,
0030     TPS65090_IRQ_OVERLOAD_FET6,
0031     TPS65090_IRQ_OVERLOAD_FET7,
0032 };
0033
0034 /* TPS65090 Regulator ID */
0035 enum {
0036     TPS65090_REGULATOR_DCDC1,
0037     TPS65090_REGULATOR_DCDC2,
0038     TPS65090_REGULATOR_DCDC3,
0039     TPS65090_REGULATOR_FET1,
0040     TPS65090_REGULATOR_FET2,
0041     TPS65090_REGULATOR_FET3,
0042     TPS65090_REGULATOR_FET4,
0043     TPS65090_REGULATOR_FET5,
0044     TPS65090_REGULATOR_FET6,
0045     TPS65090_REGULATOR_FET7,
0046     TPS65090_REGULATOR_LDO1,
0047     TPS65090_REGULATOR_LDO2,
0048
0049     /* Last entry for maximum ID */
0050     TPS65090_REGULATOR_MAX,
0051 };
0052
0053 /* Register addresses */
0054 #define TPS65090_REG_INTR_STS   0x00
0055 #define TPS65090_REG_INTR_STS2  0x01
0056 #define TPS65090_REG_INTR_MASK  0x02
0057 #define TPS65090_REG_INTR_MASK2 0x03
0058 #define TPS65090_REG_CG_CTRL0   0x04
0059 #define TPS65090_REG_CG_CTRL1   0x05
0060 #define TPS65090_REG_CG_CTRL2   0x06
0061 #define TPS65090_REG_CG_CTRL3   0x07
0062 #define TPS65090_REG_CG_CTRL4   0x08
0063 #define TPS65090_REG_CG_CTRL5   0x09
0064 #define TPS65090_REG_CG_STATUS1 0x0a
0065 #define TPS65090_REG_CG_STATUS2 0x0b
0066 #define TPS65090_REG_AD_OUT1    0x17
0067 #define TPS65090_REG_AD_OUT2    0x18
0068
0069 #define TPS65090_MAX_REG    TPS65090_REG_AD_OUT2
0070 #define TPS65090_NUM_REGS   (TPS65090_MAX_REG + 1)
0071
0072 struct gpio_desc;
0073
0074 struct tps65090 {
0075     struct device       *dev;
0076     struct regmap       *rmap;
0077     struct regmap_irq_chip_data *irq_data;
0078 };
0079
0080 /*
0081  * struct tps65090_regulator_plat_data
0082  *
0083  * @reg_init_data: The regulator init data.
0084  * @enable_ext_control: Enable extrenal control or not. Only available for
0085  *     DCDC1, DCDC2 and DCDC3.
0086  * @gpiod: Gpio descriptor if external control is enabled and controlled through
0087  *     gpio
0088  * @overcurrent_wait_valid: True if the overcurrent_wait should be applied.
0089  * @overcurrent_wait: Value to set as the overcurrent wait time.  This is the
0090  *     actual bitfield value, not a time in ms (valid value are 0 - 3).
0091  */
0092 struct tps65090_regulator_plat_data {
0093     struct regulator_init_data *reg_init_data;
0094     bool enable_ext_control;
0095     struct gpio_desc *gpiod;
0096     bool overcurrent_wait_valid;
0097     int overcurrent_wait;
0098 };
0099
0100 struct tps65090_platform_data {
0101     int irq_base;
0102
0103     char **supplied_to;
0104     size_t num_supplicants;
0105     int enable_low_current_chrg;
0106
0107     struct tps65090_regulator_plat_data *reg_pdata[TPS65090_REGULATOR_MAX];
0108 };
0109
0110 /*
0111  * NOTE: the functions below are not intended for use outside
0112  * of the TPS65090 sub-device drivers
0113  */
0114 static inline int tps65090_write(struct device *dev, int reg, uint8_t val)
0115 {
0116     struct tps65090 *tps = dev_get_drvdata(dev);
0117
0118     return regmap_write(tps->rmap, reg, val);
0119 }
0120
0121 static inline int tps65090_read(struct device *dev, int reg, uint8_t *val)
0122 {
0123     struct tps65090 *tps = dev_get_drvdata(dev);
0124     unsigned int temp_val;
0125     int ret;
0126
0127     ret = regmap_read(tps->rmap, reg, &temp_val);
0128     if (!ret)
0129         *val = temp_val;
0130     return ret;
0131 }
0132
0133 static inline int tps65090_set_bits(struct device *dev, int reg,
0134         uint8_t bit_num)
0135 {
0136     struct tps65090 *tps = dev_get_drvdata(dev);
0137
0138     return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u);
0139 }
0140
0141 static inline int tps65090_clr_bits(struct device *dev, int reg,
0142         uint8_t bit_num)
0143 {
0144     struct tps65090 *tps = dev_get_drvdata(dev);
0145
0146     return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u);
0147 }
0148
0149 #endif /*__LINUX_MFD_TPS65090_H */