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0009 #ifndef __LINUX_MFD_TPS65086_H
0010 #define __LINUX_MFD_TPS65086_H
0011
0012 #include <linux/device.h>
0013 #include <linux/regmap.h>
0014
0015
0016 #define TPS65086_DEVICEID 0x01
0017 #define TPS65086_IRQ 0x02
0018 #define TPS65086_IRQ_MASK 0x03
0019 #define TPS65086_PMICSTAT 0x04
0020 #define TPS65086_SHUTDNSRC 0x05
0021 #define TPS65086_BUCK1CTRL 0x20
0022 #define TPS65086_BUCK2CTRL 0x21
0023 #define TPS65086_BUCK3DECAY 0x22
0024 #define TPS65086_BUCK3VID 0x23
0025 #define TPS65086_BUCK3SLPCTRL 0x24
0026 #define TPS65086_BUCK4CTRL 0x25
0027 #define TPS65086_BUCK5CTRL 0x26
0028 #define TPS65086_BUCK6CTRL 0x27
0029 #define TPS65086_LDOA2CTRL 0x28
0030 #define TPS65086_LDOA3CTRL 0x29
0031 #define TPS65086_DISCHCTRL1 0x40
0032 #define TPS65086_DISCHCTRL2 0x41
0033 #define TPS65086_DISCHCTRL3 0x42
0034 #define TPS65086_PG_DELAY1 0x43
0035 #define TPS65086_FORCESHUTDN 0x91
0036 #define TPS65086_BUCK1SLPCTRL 0x92
0037 #define TPS65086_BUCK2SLPCTRL 0x93
0038 #define TPS65086_BUCK4VID 0x94
0039 #define TPS65086_BUCK4SLPVID 0x95
0040 #define TPS65086_BUCK5VID 0x96
0041 #define TPS65086_BUCK5SLPVID 0x97
0042 #define TPS65086_BUCK6VID 0x98
0043 #define TPS65086_BUCK6SLPVID 0x99
0044 #define TPS65086_LDOA2VID 0x9A
0045 #define TPS65086_LDOA3VID 0x9B
0046 #define TPS65086_BUCK123CTRL 0x9C
0047 #define TPS65086_PG_DELAY2 0x9D
0048 #define TPS65086_PIN_EN_MASK1 0x9E
0049 #define TPS65086_PIN_EN_MASK2 0x9F
0050 #define TPS65086_SWVTT_EN 0x9F
0051 #define TPS65086_PIN_EN_OVR1 0xA0
0052 #define TPS65086_PIN_EN_OVR2 0xA1
0053 #define TPS65086_GPOCTRL 0xA1
0054 #define TPS65086_PWR_FAULT_MASK1 0xA2
0055 #define TPS65086_PWR_FAULT_MASK2 0xA3
0056 #define TPS65086_GPO1PG_CTRL1 0xA4
0057 #define TPS65086_GPO1PG_CTRL2 0xA5
0058 #define TPS65086_GPO4PG_CTRL1 0xA6
0059 #define TPS65086_GPO4PG_CTRL2 0xA7
0060 #define TPS65086_GPO2PG_CTRL1 0xA8
0061 #define TPS65086_GPO2PG_CTRL2 0xA9
0062 #define TPS65086_GPO3PG_CTRL1 0xAA
0063 #define TPS65086_GPO3PG_CTRL2 0xAB
0064 #define TPS65086_LDOA1CTRL 0xAE
0065 #define TPS65086_PG_STATUS1 0xB0
0066 #define TPS65086_PG_STATUS2 0xB1
0067 #define TPS65086_PWR_FAULT_STATUS1 0xB2
0068 #define TPS65086_PWR_FAULT_STATUS2 0xB3
0069 #define TPS65086_TEMPCRIT 0xB4
0070 #define TPS65086_TEMPHOT 0xB5
0071 #define TPS65086_OC_STATUS 0xB6
0072
0073
0074 #define TPS65086_IRQ_DIETEMP_MASK BIT(0)
0075 #define TPS65086_IRQ_SHUTDN_MASK BIT(3)
0076 #define TPS65086_IRQ_FAULT_MASK BIT(7)
0077
0078
0079 #define TPS65086_DEVICEID_PART_MASK GENMASK(3, 0)
0080 #define TPS65086_DEVICEID_OTP_MASK GENMASK(5, 4)
0081 #define TPS65086_DEVICEID_REV_MASK GENMASK(7, 6)
0082
0083
0084 #define BUCK_VID_MASK GENMASK(7, 1)
0085 #define VDOA1_VID_MASK GENMASK(4, 1)
0086 #define VDOA23_VID_MASK GENMASK(3, 0)
0087
0088
0089 enum tps65086_irqs {
0090 TPS65086_IRQ_DIETEMP,
0091 TPS65086_IRQ_SHUTDN,
0092 TPS65086_IRQ_FAULT,
0093 };
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0098
0099
0100 struct tps65086 {
0101 struct device *dev;
0102 struct regmap *regmap;
0103
0104
0105 int irq;
0106 struct regmap_irq_chip_data *irq_data;
0107 };
0108
0109 #endif