mfd/syscon/imx7-iomuxc-gpr.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2015 Freescale Semiconductor, Inc.
0004  */
0005
0006 #ifndef __LINUX_IMX7_IOMUXC_GPR_H
0007 #define __LINUX_IMX7_IOMUXC_GPR_H
0008
0009 #define IOMUXC_GPR0 0x00
0010 #define IOMUXC_GPR1 0x04
0011 #define IOMUXC_GPR2 0x08
0012 #define IOMUXC_GPR3 0x0c
0013 #define IOMUXC_GPR4 0x10
0014 #define IOMUXC_GPR5 0x14
0015 #define IOMUXC_GPR6 0x18
0016 #define IOMUXC_GPR7 0x1c
0017 #define IOMUXC_GPR8 0x20
0018 #define IOMUXC_GPR9 0x24
0019 #define IOMUXC_GPR10    0x28
0020 #define IOMUXC_GPR11    0x2c
0021 #define IOMUXC_GPR12    0x30
0022 #define IOMUXC_GPR13    0x34
0023 #define IOMUXC_GPR14    0x38
0024 #define IOMUXC_GPR15    0x3c
0025 #define IOMUXC_GPR16    0x40
0026 #define IOMUXC_GPR17    0x44
0027 #define IOMUXC_GPR18    0x48
0028 #define IOMUXC_GPR19    0x4c
0029 #define IOMUXC_GPR20    0x50
0030 #define IOMUXC_GPR21    0x54
0031 #define IOMUXC_GPR22    0x58
0032
0033 /* For imx7d iomux gpr register field define */
0034 #define IMX7D_GPR1_IRQ_MASK         (0x1 << 12)
0035 #define IMX7D_GPR1_ENET1_TX_CLK_SEL_MASK    (0x1 << 13)
0036 #define IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK    (0x1 << 14)
0037 #define IMX7D_GPR1_ENET_TX_CLK_SEL_MASK     (0x3 << 13)
0038 #define IMX7D_GPR1_ENET1_CLK_DIR_MASK       (0x1 << 17)
0039 #define IMX7D_GPR1_ENET2_CLK_DIR_MASK       (0x1 << 18)
0040 #define IMX7D_GPR1_ENET_CLK_DIR_MASK        (0x3 << 17)
0041
0042 #define IMX7D_GPR5_CSI_MUX_CONTROL_MIPI     (0x1 << 4)
0043
0044 #define IMX7D_GPR12_PCIE_PHY_REFCLK_SEL     BIT(5)
0045
0046 #define IMX7D_GPR22_PCIE_PHY_PLL_LOCKED     BIT(31)
0047
0048 #endif /* __LINUX_IMX7_IOMUXC_GPR_H */