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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright (C) 2005 Ivan Kokshaysky
0004  * Copyright (C) SAN People
0005  *
0006  * System Timer (ST) - System peripherals registers.
0007  * Based on AT91RM9200 datasheet revision E.
0008  */
0009 
0010 #ifndef _LINUX_MFD_SYSCON_ATMEL_ST_H
0011 #define _LINUX_MFD_SYSCON_ATMEL_ST_H
0012 
0013 #include <linux/bitops.h>
0014 
0015 #define AT91_ST_CR  0x00    /* Control Register */
0016 #define     AT91_ST_WDRST   BIT(0)  /* Watchdog Timer Restart */
0017 
0018 #define AT91_ST_PIMR    0x04    /* Period Interval Mode Register */
0019 #define     AT91_ST_PIV 0xffff  /* Period Interval Value */
0020 
0021 #define AT91_ST_WDMR    0x08    /* Watchdog Mode Register */
0022 #define     AT91_ST_WDV 0xffff  /* Watchdog Counter Value */
0023 #define     AT91_ST_RSTEN   BIT(16) /* Reset Enable */
0024 #define     AT91_ST_EXTEN   BIT(17) /* External Signal Assertion Enable */
0025 
0026 #define AT91_ST_RTMR    0x0c    /* Real-time Mode Register */
0027 #define     AT91_ST_RTPRES  0xffff  /* Real-time Prescalar Value */
0028 
0029 #define AT91_ST_SR  0x10    /* Status Register */
0030 #define     AT91_ST_PITS    BIT(0)  /* Period Interval Timer Status */
0031 #define     AT91_ST_WDOVF   BIT(1)  /* Watchdog Overflow */
0032 #define     AT91_ST_RTTINC  BIT(2)  /* Real-time Timer Increment */
0033 #define     AT91_ST_ALMS    BIT(3)  /* Alarm Status */
0034 
0035 #define AT91_ST_IER 0x14    /* Interrupt Enable Register */
0036 #define AT91_ST_IDR 0x18    /* Interrupt Disable Register */
0037 #define AT91_ST_IMR 0x1c    /* Interrupt Mask Register */
0038 
0039 #define AT91_ST_RTAR    0x20    /* Real-time Alarm Register */
0040 #define     AT91_ST_ALMV    0xfffff /* Alarm Value */
0041 
0042 #define AT91_ST_CRTR    0x24    /* Current Real-time Register */
0043 #define     AT91_ST_CRTV    0xfffff /* Current Real-Time Value */
0044 
0045 #endif /* _LINUX_MFD_SYSCON_ATMEL_ST_H */