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0011 #ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_
0012 #define _LINUX_MFD_SYSCON_ATMEL_SMC_H_
0013
0014 #include <linux/kernel.h>
0015 #include <linux/of.h>
0016 #include <linux/regmap.h>
0017
0018 #define ATMEL_SMC_SETUP(cs) (((cs) * 0x10))
0019 #define ATMEL_HSMC_SETUP(layout, cs) \
0020 ((layout)->timing_regs_offset + ((cs) * 0x14))
0021 #define ATMEL_SMC_PULSE(cs) (((cs) * 0x10) + 0x4)
0022 #define ATMEL_HSMC_PULSE(layout, cs) \
0023 ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x4)
0024 #define ATMEL_SMC_CYCLE(cs) (((cs) * 0x10) + 0x8)
0025 #define ATMEL_HSMC_CYCLE(layout, cs) \
0026 ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x8)
0027 #define ATMEL_SMC_NWE_SHIFT 0
0028 #define ATMEL_SMC_NCS_WR_SHIFT 8
0029 #define ATMEL_SMC_NRD_SHIFT 16
0030 #define ATMEL_SMC_NCS_RD_SHIFT 24
0031
0032 #define ATMEL_SMC_MODE(cs) (((cs) * 0x10) + 0xc)
0033 #define ATMEL_HSMC_MODE(layout, cs) \
0034 ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x10)
0035 #define ATMEL_SMC_MODE_READMODE_MASK BIT(0)
0036 #define ATMEL_SMC_MODE_READMODE_NCS (0 << 0)
0037 #define ATMEL_SMC_MODE_READMODE_NRD (1 << 0)
0038 #define ATMEL_SMC_MODE_WRITEMODE_MASK BIT(1)
0039 #define ATMEL_SMC_MODE_WRITEMODE_NCS (0 << 1)
0040 #define ATMEL_SMC_MODE_WRITEMODE_NWE (1 << 1)
0041 #define ATMEL_SMC_MODE_EXNWMODE_MASK GENMASK(5, 4)
0042 #define ATMEL_SMC_MODE_EXNWMODE_DISABLE (0 << 4)
0043 #define ATMEL_SMC_MODE_EXNWMODE_FROZEN (2 << 4)
0044 #define ATMEL_SMC_MODE_EXNWMODE_READY (3 << 4)
0045 #define ATMEL_SMC_MODE_BAT_MASK BIT(8)
0046 #define ATMEL_SMC_MODE_BAT_SELECT (0 << 8)
0047 #define ATMEL_SMC_MODE_BAT_WRITE (1 << 8)
0048 #define ATMEL_SMC_MODE_DBW_MASK GENMASK(13, 12)
0049 #define ATMEL_SMC_MODE_DBW_8 (0 << 12)
0050 #define ATMEL_SMC_MODE_DBW_16 (1 << 12)
0051 #define ATMEL_SMC_MODE_DBW_32 (2 << 12)
0052 #define ATMEL_SMC_MODE_TDF_MASK GENMASK(19, 16)
0053 #define ATMEL_SMC_MODE_TDF(x) (((x) - 1) << 16)
0054 #define ATMEL_SMC_MODE_TDF_MAX 16
0055 #define ATMEL_SMC_MODE_TDF_MIN 1
0056 #define ATMEL_SMC_MODE_TDFMODE_OPTIMIZED BIT(20)
0057 #define ATMEL_SMC_MODE_PMEN BIT(24)
0058 #define ATMEL_SMC_MODE_PS_MASK GENMASK(29, 28)
0059 #define ATMEL_SMC_MODE_PS_4 (0 << 28)
0060 #define ATMEL_SMC_MODE_PS_8 (1 << 28)
0061 #define ATMEL_SMC_MODE_PS_16 (2 << 28)
0062 #define ATMEL_SMC_MODE_PS_32 (3 << 28)
0063
0064 #define ATMEL_HSMC_TIMINGS(layout, cs) \
0065 ((layout)->timing_regs_offset + ((cs) * 0x14) + 0xc)
0066 #define ATMEL_HSMC_TIMINGS_OCMS BIT(12)
0067 #define ATMEL_HSMC_TIMINGS_RBNSEL(x) ((x) << 28)
0068 #define ATMEL_HSMC_TIMINGS_NFSEL BIT(31)
0069 #define ATMEL_HSMC_TIMINGS_TCLR_SHIFT 0
0070 #define ATMEL_HSMC_TIMINGS_TADL_SHIFT 4
0071 #define ATMEL_HSMC_TIMINGS_TAR_SHIFT 8
0072 #define ATMEL_HSMC_TIMINGS_TRR_SHIFT 16
0073 #define ATMEL_HSMC_TIMINGS_TWB_SHIFT 24
0074
0075 struct atmel_hsmc_reg_layout {
0076 unsigned int timing_regs_offset;
0077 };
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0087
0088 struct atmel_smc_cs_conf {
0089 u32 setup;
0090 u32 pulse;
0091 u32 cycle;
0092 u32 timings;
0093 u32 mode;
0094 };
0095
0096 void atmel_smc_cs_conf_init(struct atmel_smc_cs_conf *conf);
0097 int atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf,
0098 unsigned int shift,
0099 unsigned int ncycles);
0100 int atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf,
0101 unsigned int shift, unsigned int ncycles);
0102 int atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf,
0103 unsigned int shift, unsigned int ncycles);
0104 int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf,
0105 unsigned int shift, unsigned int ncycles);
0106 void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs,
0107 const struct atmel_smc_cs_conf *conf);
0108 void atmel_hsmc_cs_conf_apply(struct regmap *regmap,
0109 const struct atmel_hsmc_reg_layout *reglayout,
0110 int cs, const struct atmel_smc_cs_conf *conf);
0111 void atmel_smc_cs_conf_get(struct regmap *regmap, int cs,
0112 struct atmel_smc_cs_conf *conf);
0113 void atmel_hsmc_cs_conf_get(struct regmap *regmap,
0114 const struct atmel_hsmc_reg_layout *reglayout,
0115 int cs, struct atmel_smc_cs_conf *conf);
0116 const struct atmel_hsmc_reg_layout *
0117 atmel_hsmc_get_reg_layout(struct device_node *np);
0118
0119 #endif