mfd/syscon/atmel-matrix.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  *  Copyright (C) 2014 Atmel Corporation.
0004  *
0005  * Memory Controllers (MATRIX, EBI) - System peripherals registers.
0006  */
0007
0008 #ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
0009 #define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
0010
0011 #define AT91SAM9260_MATRIX_MCFG         0x00
0012 #define AT91SAM9260_MATRIX_SCFG         0x40
0013 #define AT91SAM9260_MATRIX_PRS          0x80
0014 #define AT91SAM9260_MATRIX_MRCR         0x100
0015 #define AT91SAM9260_MATRIX_EBICSA       0x11c
0016
0017 #define AT91SAM9261_MATRIX_MRCR         0x0
0018 #define AT91SAM9261_MATRIX_SCFG         0x4
0019 #define AT91SAM9261_MATRIX_TCR          0x24
0020 #define AT91SAM9261_MATRIX_EBICSA       0x30
0021 #define AT91SAM9261_MATRIX_USBPUCR      0x34
0022
0023 #define AT91SAM9263_MATRIX_MCFG         0x00
0024 #define AT91SAM9263_MATRIX_SCFG         0x40
0025 #define AT91SAM9263_MATRIX_PRS          0x80
0026 #define AT91SAM9263_MATRIX_MRCR         0x100
0027 #define AT91SAM9263_MATRIX_TCR          0x114
0028 #define AT91SAM9263_MATRIX_EBI0CSA      0x120
0029 #define AT91SAM9263_MATRIX_EBI1CSA      0x124
0030
0031 #define AT91SAM9RL_MATRIX_MCFG          0x00
0032 #define AT91SAM9RL_MATRIX_SCFG          0x40
0033 #define AT91SAM9RL_MATRIX_PRS           0x80
0034 #define AT91SAM9RL_MATRIX_MRCR          0x100
0035 #define AT91SAM9RL_MATRIX_TCR           0x114
0036 #define AT91SAM9RL_MATRIX_EBICSA        0x120
0037
0038 #define AT91SAM9G45_MATRIX_MCFG         0x00
0039 #define AT91SAM9G45_MATRIX_SCFG         0x40
0040 #define AT91SAM9G45_MATRIX_PRS          0x80
0041 #define AT91SAM9G45_MATRIX_MRCR         0x100
0042 #define AT91SAM9G45_MATRIX_TCR          0x110
0043 #define AT91SAM9G45_MATRIX_DDRMPR       0x118
0044 #define AT91SAM9G45_MATRIX_EBICSA       0x128
0045
0046 #define AT91SAM9N12_MATRIX_MCFG         0x00
0047 #define AT91SAM9N12_MATRIX_SCFG         0x40
0048 #define AT91SAM9N12_MATRIX_PRS          0x80
0049 #define AT91SAM9N12_MATRIX_MRCR         0x100
0050 #define AT91SAM9N12_MATRIX_EBICSA       0x118
0051
0052 #define AT91SAM9X5_MATRIX_MCFG          0x00
0053 #define AT91SAM9X5_MATRIX_SCFG          0x40
0054 #define AT91SAM9X5_MATRIX_PRS           0x80
0055 #define AT91SAM9X5_MATRIX_MRCR          0x100
0056 #define AT91SAM9X5_MATRIX_EBICSA        0x120
0057
0058 #define SAMA5D3_MATRIX_MCFG         0x00
0059 #define SAMA5D3_MATRIX_SCFG         0x40
0060 #define SAMA5D3_MATRIX_PRS          0x80
0061 #define SAMA5D3_MATRIX_MRCR         0x100
0062
0063 #define AT91_MATRIX_MCFG(o, x)          ((o) + ((x) * 0x4))
0064 #define AT91_MATRIX_ULBT            GENMASK(2, 0)
0065 #define AT91_MATRIX_ULBT_INFINITE       (0 << 0)
0066 #define AT91_MATRIX_ULBT_SINGLE         (1 << 0)
0067 #define AT91_MATRIX_ULBT_FOUR           (2 << 0)
0068 #define AT91_MATRIX_ULBT_EIGHT          (3 << 0)
0069 #define AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
0070
0071 #define AT91_MATRIX_SCFG(o, x)          ((o) + ((x) * 0x4))
0072 #define AT91_MATRIX_SLOT_CYCLE          GENMASK(7,  0)
0073 #define AT91_MATRIX_DEFMSTR_TYPE        GENMASK(17, 16)
0074 #define AT91_MATRIX_DEFMSTR_TYPE_NONE       (0 << 16)
0075 #define AT91_MATRIX_DEFMSTR_TYPE_LAST       (1 << 16)
0076 #define AT91_MATRIX_DEFMSTR_TYPE_FIXED      (2 << 16)
0077 #define AT91_MATRIX_FIXED_DEFMSTR       GENMASK(20, 18)
0078 #define AT91_MATRIX_ARBT            GENMASK(25, 24)
0079 #define AT91_MATRIX_ARBT_ROUND_ROBIN        (0 << 24)
0080 #define AT91_MATRIX_ARBT_FIXED_PRIORITY     (1 << 24)
0081
0082 #define AT91_MATRIX_ITCM_SIZE           GENMASK(3, 0)
0083 #define AT91_MATRIX_ITCM_0          (0 << 0)
0084 #define AT91_MATRIX_ITCM_16         (5 << 0)
0085 #define AT91_MATRIX_ITCM_32         (6 << 0)
0086 #define AT91_MATRIX_ITCM_64         (7 << 0)
0087 #define AT91_MATRIX_DTCM_SIZE           GENMASK(7, 4)
0088 #define AT91_MATRIX_DTCM_0          (0 << 4)
0089 #define AT91_MATRIX_DTCM_16         (5 << 4)
0090 #define AT91_MATRIX_DTCM_32         (6 << 4)
0091 #define AT91_MATRIX_DTCM_64         (7 << 4)
0092
0093 #define AT91_MATRIX_PRAS(o, x)          ((o) + ((x) * 0x8))
0094 #define AT91_MATRIX_PRBS(o, x)          ((o) + ((x) * 0x8) + 0x4)
0095 #define AT91_MATRIX_MPR(x)          GENMASK(((x) * 0x4) + 1, ((x) * 0x4))
0096
0097 #define AT91_MATRIX_RCB(x)          BIT(x)
0098
0099 #define AT91_MATRIX_CSA(cs, val)        (val << (cs))
0100 #define AT91_MATRIX_DBPUC           BIT(8)
0101 #define AT91_MATRIX_DBPDC           BIT(9)
0102 #define AT91_MATRIX_VDDIOMSEL           BIT(16)
0103 #define AT91_MATRIX_VDDIOMSEL_1_8V      (0 << 16)
0104 #define AT91_MATRIX_VDDIOMSEL_3_3V      (1 << 16)
0105 #define AT91_MATRIX_EBI_IOSR            BIT(17)
0106 #define AT91_MATRIX_DDR_IOSR            BIT(18)
0107 #define AT91_MATRIX_NFD0_SELECT         BIT(24)
0108 #define AT91_MATRIX_DDR_MP_EN           BIT(25)
0109
0110 #define AT91_MATRIX_USBPUCR_PUON        BIT(30)
0111
0112 #endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */