0001
0002
0003
0004
0005
0006
0007
0008 #ifndef __LINUX_MFD_STMPE_H
0009 #define __LINUX_MFD_STMPE_H
0010
0011 #include <linux/mutex.h>
0012
0013 #define STMPE_SAMPLE_TIME(x) ((x & 0xf) << 4)
0014 #define STMPE_MOD_12B(x) ((x & 0x1) << 3)
0015 #define STMPE_REF_SEL(x) ((x & 0x1) << 1)
0016 #define STMPE_ADC_FREQ(x) (x & 0x3)
0017 #define STMPE_AVE_CTRL(x) ((x & 0x3) << 6)
0018 #define STMPE_DET_DELAY(x) ((x & 0x7) << 3)
0019 #define STMPE_SETTLING(x) (x & 0x7)
0020 #define STMPE_FRACTION_Z(x) (x & 0x7)
0021 #define STMPE_I_DRIVE(x) (x & 0x1)
0022 #define STMPE_OP_MODE(x) ((x & 0x7) << 1)
0023
0024 #define STMPE811_REG_ADC_CTRL1 0x20
0025 #define STMPE811_REG_ADC_CTRL2 0x21
0026
0027 struct device;
0028 struct regulator;
0029
0030 enum stmpe_block {
0031 STMPE_BLOCK_GPIO = 1 << 0,
0032 STMPE_BLOCK_KEYPAD = 1 << 1,
0033 STMPE_BLOCK_TOUCHSCREEN = 1 << 2,
0034 STMPE_BLOCK_ADC = 1 << 3,
0035 STMPE_BLOCK_PWM = 1 << 4,
0036 STMPE_BLOCK_ROTATOR = 1 << 5,
0037 };
0038
0039 enum stmpe_partnum {
0040 STMPE610,
0041 STMPE801,
0042 STMPE811,
0043 STMPE1600,
0044 STMPE1601,
0045 STMPE1801,
0046 STMPE2401,
0047 STMPE2403,
0048 STMPE_NBR_PARTS
0049 };
0050
0051
0052
0053
0054
0055 enum {
0056 STMPE_IDX_CHIP_ID,
0057 STMPE_IDX_SYS_CTRL,
0058 STMPE_IDX_SYS_CTRL2,
0059 STMPE_IDX_ICR_LSB,
0060 STMPE_IDX_IER_LSB,
0061 STMPE_IDX_IER_MSB,
0062 STMPE_IDX_ISR_LSB,
0063 STMPE_IDX_ISR_MSB,
0064 STMPE_IDX_GPMR_LSB,
0065 STMPE_IDX_GPMR_CSB,
0066 STMPE_IDX_GPMR_MSB,
0067 STMPE_IDX_GPSR_LSB,
0068 STMPE_IDX_GPSR_CSB,
0069 STMPE_IDX_GPSR_MSB,
0070 STMPE_IDX_GPCR_LSB,
0071 STMPE_IDX_GPCR_CSB,
0072 STMPE_IDX_GPCR_MSB,
0073 STMPE_IDX_GPDR_LSB,
0074 STMPE_IDX_GPDR_CSB,
0075 STMPE_IDX_GPDR_MSB,
0076 STMPE_IDX_GPEDR_LSB,
0077 STMPE_IDX_GPEDR_CSB,
0078 STMPE_IDX_GPEDR_MSB,
0079 STMPE_IDX_GPRER_LSB,
0080 STMPE_IDX_GPRER_CSB,
0081 STMPE_IDX_GPRER_MSB,
0082 STMPE_IDX_GPFER_LSB,
0083 STMPE_IDX_GPFER_CSB,
0084 STMPE_IDX_GPFER_MSB,
0085 STMPE_IDX_GPPUR_LSB,
0086 STMPE_IDX_GPPDR_LSB,
0087 STMPE_IDX_GPAFR_U_MSB,
0088 STMPE_IDX_IEGPIOR_LSB,
0089 STMPE_IDX_IEGPIOR_CSB,
0090 STMPE_IDX_IEGPIOR_MSB,
0091 STMPE_IDX_ISGPIOR_LSB,
0092 STMPE_IDX_ISGPIOR_CSB,
0093 STMPE_IDX_ISGPIOR_MSB,
0094 STMPE_IDX_MAX,
0095 };
0096
0097
0098 struct stmpe_variant_info;
0099 struct stmpe_client_info;
0100 struct stmpe_platform_data;
0101
0102
0103
0104
0105
0106
0107
0108
0109
0110
0111
0112
0113
0114
0115
0116
0117
0118
0119
0120
0121
0122 struct stmpe {
0123 struct regulator *vcc;
0124 struct regulator *vio;
0125 struct mutex lock;
0126 struct mutex irq_lock;
0127 struct device *dev;
0128 struct irq_domain *domain;
0129 void *client;
0130 struct stmpe_client_info *ci;
0131 enum stmpe_partnum partnum;
0132 struct stmpe_variant_info *variant;
0133 const u8 *regs;
0134
0135 int irq;
0136 int num_gpios;
0137 u8 ier[2];
0138 u8 oldier[2];
0139 struct stmpe_platform_data *pdata;
0140
0141
0142 u8 sample_time;
0143 u8 mod_12b;
0144 u8 ref_sel;
0145 u8 adc_freq;
0146 };
0147
0148 extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data);
0149 extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg);
0150 extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
0151 u8 *values);
0152 extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
0153 const u8 *values);
0154 extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val);
0155 extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins,
0156 enum stmpe_block block);
0157 extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks);
0158 extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks);
0159 extern int stmpe811_adc_common_init(struct stmpe *stmpe);
0160
0161 #define STMPE_GPIO_NOREQ_811_TOUCH (0xf0)
0162
0163 #endif