mfd/samsung/s5m8767.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright (c) 2011 Samsung Electronics Co., Ltd
0004  *              http://www.samsung.com
0005  */
0006
0007 #ifndef __LINUX_MFD_S5M8767_H
0008 #define __LINUX_MFD_S5M8767_H
0009
0010 /* S5M8767 registers */
0011 enum s5m8767_reg {
0012     S5M8767_REG_ID,
0013     S5M8767_REG_INT1,
0014     S5M8767_REG_INT2,
0015     S5M8767_REG_INT3,
0016     S5M8767_REG_INT1M,
0017     S5M8767_REG_INT2M,
0018     S5M8767_REG_INT3M,
0019     S5M8767_REG_STATUS1,
0020     S5M8767_REG_STATUS2,
0021     S5M8767_REG_STATUS3,
0022     S5M8767_REG_CTRL1,
0023     S5M8767_REG_CTRL2,
0024     S5M8767_REG_LOWBAT1,
0025     S5M8767_REG_LOWBAT2,
0026     S5M8767_REG_BUCHG,
0027     S5M8767_REG_DVSRAMP,
0028     S5M8767_REG_DVSTIMER2 = 0x10,
0029     S5M8767_REG_DVSTIMER3,
0030     S5M8767_REG_DVSTIMER4,
0031     S5M8767_REG_LDO1,
0032     S5M8767_REG_LDO2,
0033     S5M8767_REG_LDO3,
0034     S5M8767_REG_LDO4,
0035     S5M8767_REG_LDO5,
0036     S5M8767_REG_LDO6,
0037     S5M8767_REG_LDO7,
0038     S5M8767_REG_LDO8,
0039     S5M8767_REG_LDO9,
0040     S5M8767_REG_LDO10,
0041     S5M8767_REG_LDO11,
0042     S5M8767_REG_LDO12,
0043     S5M8767_REG_LDO13,
0044     S5M8767_REG_LDO14 = 0x20,
0045     S5M8767_REG_LDO15,
0046     S5M8767_REG_LDO16,
0047     S5M8767_REG_LDO17,
0048     S5M8767_REG_LDO18,
0049     S5M8767_REG_LDO19,
0050     S5M8767_REG_LDO20,
0051     S5M8767_REG_LDO21,
0052     S5M8767_REG_LDO22,
0053     S5M8767_REG_LDO23,
0054     S5M8767_REG_LDO24,
0055     S5M8767_REG_LDO25,
0056     S5M8767_REG_LDO26,
0057     S5M8767_REG_LDO27,
0058     S5M8767_REG_LDO28,
0059     S5M8767_REG_UVLO = 0x31,
0060     S5M8767_REG_BUCK1CTRL1,
0061     S5M8767_REG_BUCK1CTRL2,
0062     S5M8767_REG_BUCK2CTRL,
0063     S5M8767_REG_BUCK2DVS1,
0064     S5M8767_REG_BUCK2DVS2,
0065     S5M8767_REG_BUCK2DVS3,
0066     S5M8767_REG_BUCK2DVS4,
0067     S5M8767_REG_BUCK2DVS5,
0068     S5M8767_REG_BUCK2DVS6,
0069     S5M8767_REG_BUCK2DVS7,
0070     S5M8767_REG_BUCK2DVS8,
0071     S5M8767_REG_BUCK3CTRL,
0072     S5M8767_REG_BUCK3DVS1,
0073     S5M8767_REG_BUCK3DVS2,
0074     S5M8767_REG_BUCK3DVS3,
0075     S5M8767_REG_BUCK3DVS4,
0076     S5M8767_REG_BUCK3DVS5,
0077     S5M8767_REG_BUCK3DVS6,
0078     S5M8767_REG_BUCK3DVS7,
0079     S5M8767_REG_BUCK3DVS8,
0080     S5M8767_REG_BUCK4CTRL,
0081     S5M8767_REG_BUCK4DVS1,
0082     S5M8767_REG_BUCK4DVS2,
0083     S5M8767_REG_BUCK4DVS3,
0084     S5M8767_REG_BUCK4DVS4,
0085     S5M8767_REG_BUCK4DVS5,
0086     S5M8767_REG_BUCK4DVS6,
0087     S5M8767_REG_BUCK4DVS7,
0088     S5M8767_REG_BUCK4DVS8,
0089     S5M8767_REG_BUCK5CTRL1,
0090     S5M8767_REG_BUCK5CTRL2,
0091     S5M8767_REG_BUCK5CTRL3,
0092     S5M8767_REG_BUCK5CTRL4,
0093     S5M8767_REG_BUCK5CTRL5,
0094     S5M8767_REG_BUCK6CTRL1,
0095     S5M8767_REG_BUCK6CTRL2,
0096     S5M8767_REG_BUCK7CTRL1,
0097     S5M8767_REG_BUCK7CTRL2,
0098     S5M8767_REG_BUCK8CTRL1,
0099     S5M8767_REG_BUCK8CTRL2,
0100     S5M8767_REG_BUCK9CTRL1,
0101     S5M8767_REG_BUCK9CTRL2,
0102     S5M8767_REG_LDO1CTRL,
0103     S5M8767_REG_LDO2_1CTRL,
0104     S5M8767_REG_LDO2_2CTRL,
0105     S5M8767_REG_LDO2_3CTRL,
0106     S5M8767_REG_LDO2_4CTRL,
0107     S5M8767_REG_LDO3CTRL,
0108     S5M8767_REG_LDO4CTRL,
0109     S5M8767_REG_LDO5CTRL,
0110     S5M8767_REG_LDO6CTRL,
0111     S5M8767_REG_LDO7CTRL,
0112     S5M8767_REG_LDO8CTRL,
0113     S5M8767_REG_LDO9CTRL,
0114     S5M8767_REG_LDO10CTRL,
0115     S5M8767_REG_LDO11CTRL,
0116     S5M8767_REG_LDO12CTRL,
0117     S5M8767_REG_LDO13CTRL,
0118     S5M8767_REG_LDO14CTRL,
0119     S5M8767_REG_LDO15CTRL,
0120     S5M8767_REG_LDO16CTRL,
0121     S5M8767_REG_LDO17CTRL,
0122     S5M8767_REG_LDO18CTRL,
0123     S5M8767_REG_LDO19CTRL,
0124     S5M8767_REG_LDO20CTRL,
0125     S5M8767_REG_LDO21CTRL,
0126     S5M8767_REG_LDO22CTRL,
0127     S5M8767_REG_LDO23CTRL,
0128     S5M8767_REG_LDO24CTRL,
0129     S5M8767_REG_LDO25CTRL,
0130     S5M8767_REG_LDO26CTRL,
0131     S5M8767_REG_LDO27CTRL,
0132     S5M8767_REG_LDO28CTRL,
0133 };
0134
0135 /* S5M8767 regulator ids */
0136 enum s5m8767_regulators {
0137     S5M8767_LDO1,
0138     S5M8767_LDO2,
0139     S5M8767_LDO3,
0140     S5M8767_LDO4,
0141     S5M8767_LDO5,
0142     S5M8767_LDO6,
0143     S5M8767_LDO7,
0144     S5M8767_LDO8,
0145     S5M8767_LDO9,
0146     S5M8767_LDO10,
0147     S5M8767_LDO11,
0148     S5M8767_LDO12,
0149     S5M8767_LDO13,
0150     S5M8767_LDO14,
0151     S5M8767_LDO15,
0152     S5M8767_LDO16,
0153     S5M8767_LDO17,
0154     S5M8767_LDO18,
0155     S5M8767_LDO19,
0156     S5M8767_LDO20,
0157     S5M8767_LDO21,
0158     S5M8767_LDO22,
0159     S5M8767_LDO23,
0160     S5M8767_LDO24,
0161     S5M8767_LDO25,
0162     S5M8767_LDO26,
0163     S5M8767_LDO27,
0164     S5M8767_LDO28,
0165     S5M8767_BUCK1,
0166     S5M8767_BUCK2,
0167     S5M8767_BUCK3,
0168     S5M8767_BUCK4,
0169     S5M8767_BUCK5,
0170     S5M8767_BUCK6,
0171     S5M8767_BUCK7,
0172     S5M8767_BUCK8,
0173     S5M8767_BUCK9,
0174     S5M8767_AP_EN32KHZ,
0175     S5M8767_CP_EN32KHZ,
0176
0177     S5M8767_REG_MAX,
0178 };
0179
0180 /* LDO_EN/BUCK_EN field in registers */
0181 #define S5M8767_ENCTRL_SHIFT        6
0182 #define S5M8767_ENCTRL_MASK     (0x3 << S5M8767_ENCTRL_SHIFT)
0183
0184 /*
0185  * LDO_EN/BUCK_EN register value for controlling this Buck or LDO
0186  * by GPIO (PWREN, BUCKEN).
0187  */
0188 #define S5M8767_ENCTRL_USE_GPIO     0x1
0189
0190 /*
0191  * Values for BUCK_RAMP field in DVS_RAMP register, matching raw values
0192  * in mV/us.
0193  */
0194 enum s5m8767_dvs_buck_ramp_values {
0195     S5M8767_DVS_BUCK_RAMP_5     = 0x4,
0196     S5M8767_DVS_BUCK_RAMP_10    = 0x9,
0197     S5M8767_DVS_BUCK_RAMP_12_5  = 0xb,
0198     S5M8767_DVS_BUCK_RAMP_25    = 0xd,
0199     S5M8767_DVS_BUCK_RAMP_50    = 0xe,
0200     S5M8767_DVS_BUCK_RAMP_100   = 0xf,
0201 };
0202 #define S5M8767_DVS_BUCK_RAMP_SHIFT 4
0203 #define S5M8767_DVS_BUCK_RAMP_MASK  (0xf << S5M8767_DVS_BUCK_RAMP_SHIFT)
0204
0205 #endif /* __LINUX_MFD_S5M8767_H */