mfd/samsung/s2mps11.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright (c) 2012 Samsung Electronics Co., Ltd
0004  *              http://www.samsung.com
0005  */
0006
0007 #ifndef __LINUX_MFD_S2MPS11_H
0008 #define __LINUX_MFD_S2MPS11_H
0009
0010 /* S2MPS11 registers */
0011 enum s2mps11_reg {
0012     S2MPS11_REG_ID,
0013     S2MPS11_REG_INT1,
0014     S2MPS11_REG_INT2,
0015     S2MPS11_REG_INT3,
0016     S2MPS11_REG_INT1M,
0017     S2MPS11_REG_INT2M,
0018     S2MPS11_REG_INT3M,
0019     S2MPS11_REG_ST1,
0020     S2MPS11_REG_ST2,
0021     S2MPS11_REG_OFFSRC,
0022     S2MPS11_REG_PWRONSRC,
0023     S2MPS11_REG_RTC_CTRL,
0024     S2MPS11_REG_CTRL1,
0025     S2MPS11_REG_ETC_TEST,
0026     S2MPS11_REG_RSVD3,
0027     S2MPS11_REG_BU_CHG,
0028     S2MPS11_REG_RAMP,
0029     S2MPS11_REG_RAMP_BUCK,
0030     S2MPS11_REG_LDO1_8,
0031     S2MPS11_REG_LDO9_16,
0032     S2MPS11_REG_LDO17_24,
0033     S2MPS11_REG_LDO25_32,
0034     S2MPS11_REG_LDO33_38,
0035     S2MPS11_REG_LDO1_8_1,
0036     S2MPS11_REG_LDO9_16_1,
0037     S2MPS11_REG_LDO17_24_1,
0038     S2MPS11_REG_LDO25_32_1,
0039     S2MPS11_REG_LDO33_38_1,
0040     S2MPS11_REG_OTP_ADRL,
0041     S2MPS11_REG_OTP_ADRH,
0042     S2MPS11_REG_OTP_DATA,
0043     S2MPS11_REG_MON1SEL,
0044     S2MPS11_REG_MON2SEL,
0045     S2MPS11_REG_LEE,
0046     S2MPS11_REG_RSVD_NO,
0047     S2MPS11_REG_UVLO,
0048     S2MPS11_REG_LEE_NO,
0049     S2MPS11_REG_B1CTRL1,
0050     S2MPS11_REG_B1CTRL2,
0051     S2MPS11_REG_B2CTRL1,
0052     S2MPS11_REG_B2CTRL2,
0053     S2MPS11_REG_B3CTRL1,
0054     S2MPS11_REG_B3CTRL2,
0055     S2MPS11_REG_B4CTRL1,
0056     S2MPS11_REG_B4CTRL2,
0057     S2MPS11_REG_B5CTRL1,
0058     S2MPS11_REG_BUCK5_SW,
0059     S2MPS11_REG_B5CTRL2,
0060     S2MPS11_REG_B5CTRL3,
0061     S2MPS11_REG_B5CTRL4,
0062     S2MPS11_REG_B5CTRL5,
0063     S2MPS11_REG_B6CTRL1,
0064     S2MPS11_REG_B6CTRL2,
0065     S2MPS11_REG_B7CTRL1,
0066     S2MPS11_REG_B7CTRL2,
0067     S2MPS11_REG_B8CTRL1,
0068     S2MPS11_REG_B8CTRL2,
0069     S2MPS11_REG_B9CTRL1,
0070     S2MPS11_REG_B9CTRL2,
0071     S2MPS11_REG_B10CTRL1,
0072     S2MPS11_REG_B10CTRL2,
0073     S2MPS11_REG_L1CTRL,
0074     S2MPS11_REG_L2CTRL,
0075     S2MPS11_REG_L3CTRL,
0076     S2MPS11_REG_L4CTRL,
0077     S2MPS11_REG_L5CTRL,
0078     S2MPS11_REG_L6CTRL,
0079     S2MPS11_REG_L7CTRL,
0080     S2MPS11_REG_L8CTRL,
0081     S2MPS11_REG_L9CTRL,
0082     S2MPS11_REG_L10CTRL,
0083     S2MPS11_REG_L11CTRL,
0084     S2MPS11_REG_L12CTRL,
0085     S2MPS11_REG_L13CTRL,
0086     S2MPS11_REG_L14CTRL,
0087     S2MPS11_REG_L15CTRL,
0088     S2MPS11_REG_L16CTRL,
0089     S2MPS11_REG_L17CTRL,
0090     S2MPS11_REG_L18CTRL,
0091     S2MPS11_REG_L19CTRL,
0092     S2MPS11_REG_L20CTRL,
0093     S2MPS11_REG_L21CTRL,
0094     S2MPS11_REG_L22CTRL,
0095     S2MPS11_REG_L23CTRL,
0096     S2MPS11_REG_L24CTRL,
0097     S2MPS11_REG_L25CTRL,
0098     S2MPS11_REG_L26CTRL,
0099     S2MPS11_REG_L27CTRL,
0100     S2MPS11_REG_L28CTRL,
0101     S2MPS11_REG_L29CTRL,
0102     S2MPS11_REG_L30CTRL,
0103     S2MPS11_REG_L31CTRL,
0104     S2MPS11_REG_L32CTRL,
0105     S2MPS11_REG_L33CTRL,
0106     S2MPS11_REG_L34CTRL,
0107     S2MPS11_REG_L35CTRL,
0108     S2MPS11_REG_L36CTRL,
0109     S2MPS11_REG_L37CTRL,
0110     S2MPS11_REG_L38CTRL,
0111 };
0112
0113 /* S2MPS11 regulator ids */
0114 enum s2mps11_regulators {
0115     S2MPS11_LDO1,
0116     S2MPS11_LDO2,
0117     S2MPS11_LDO3,
0118     S2MPS11_LDO4,
0119     S2MPS11_LDO5,
0120     S2MPS11_LDO6,
0121     S2MPS11_LDO7,
0122     S2MPS11_LDO8,
0123     S2MPS11_LDO9,
0124     S2MPS11_LDO10,
0125     S2MPS11_LDO11,
0126     S2MPS11_LDO12,
0127     S2MPS11_LDO13,
0128     S2MPS11_LDO14,
0129     S2MPS11_LDO15,
0130     S2MPS11_LDO16,
0131     S2MPS11_LDO17,
0132     S2MPS11_LDO18,
0133     S2MPS11_LDO19,
0134     S2MPS11_LDO20,
0135     S2MPS11_LDO21,
0136     S2MPS11_LDO22,
0137     S2MPS11_LDO23,
0138     S2MPS11_LDO24,
0139     S2MPS11_LDO25,
0140     S2MPS11_LDO26,
0141     S2MPS11_LDO27,
0142     S2MPS11_LDO28,
0143     S2MPS11_LDO29,
0144     S2MPS11_LDO30,
0145     S2MPS11_LDO31,
0146     S2MPS11_LDO32,
0147     S2MPS11_LDO33,
0148     S2MPS11_LDO34,
0149     S2MPS11_LDO35,
0150     S2MPS11_LDO36,
0151     S2MPS11_LDO37,
0152     S2MPS11_LDO38,
0153     S2MPS11_BUCK1,
0154     S2MPS11_BUCK2,
0155     S2MPS11_BUCK3,
0156     S2MPS11_BUCK4,
0157     S2MPS11_BUCK5,
0158     S2MPS11_BUCK6,
0159     S2MPS11_BUCK7,
0160     S2MPS11_BUCK8,
0161     S2MPS11_BUCK9,
0162     S2MPS11_BUCK10,
0163
0164     S2MPS11_REGULATOR_MAX,
0165 };
0166
0167 #define S2MPS11_LDO_VSEL_MASK   0x3F
0168 #define S2MPS11_BUCK_VSEL_MASK  0xFF
0169 #define S2MPS11_BUCK9_VSEL_MASK 0x1F
0170 #define S2MPS11_ENABLE_MASK (0x03 << S2MPS11_ENABLE_SHIFT)
0171 #define S2MPS11_ENABLE_SHIFT    0x06
0172 #define S2MPS11_LDO_N_VOLTAGES  (S2MPS11_LDO_VSEL_MASK + 1)
0173 #define S2MPS11_BUCK12346_N_VOLTAGES    153
0174 #define S2MPS11_BUCK5_N_VOLTAGES    216
0175 #define S2MPS11_BUCK7810_N_VOLTAGES 225
0176 #define S2MPS11_BUCK9_N_VOLTAGES (S2MPS11_BUCK9_VSEL_MASK + 1)
0177 #define S2MPS11_RAMP_DELAY  25000       /* uV/us */
0178
0179 #define S2MPS11_CTRL1_PWRHOLD_MASK  BIT(4)
0180
0181 #define S2MPS11_BUCK2_RAMP_SHIFT    6
0182 #define S2MPS11_BUCK34_RAMP_SHIFT   4
0183 #define S2MPS11_BUCK5_RAMP_SHIFT    6
0184 #define S2MPS11_BUCK16_RAMP_SHIFT   4
0185 #define S2MPS11_BUCK7810_RAMP_SHIFT 2
0186 #define S2MPS11_BUCK9_RAMP_SHIFT    0
0187 #define S2MPS11_BUCK2_RAMP_EN_SHIFT 3
0188 #define S2MPS11_BUCK3_RAMP_EN_SHIFT 2
0189 #define S2MPS11_BUCK4_RAMP_EN_SHIFT 1
0190 #define S2MPS11_BUCK6_RAMP_EN_SHIFT 0
0191 #define S2MPS11_PMIC_EN_SHIFT   6
0192
0193 /*
0194  * Bits for "enable suspend" (On/Off controlled by PWREN)
0195  * are the same as in S2MPS14: S2MPS14_ENABLE_SUSPEND
0196  */
0197
0198 #endif /*  __LINUX_MFD_S2MPS11_H */