mfd/samsung/s2mpa01.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright (c) 2013 Samsung Electronics Co., Ltd
0004  *      http://www.samsung.com
0005  */
0006
0007 #ifndef __LINUX_MFD_S2MPA01_H
0008 #define __LINUX_MFD_S2MPA01_H
0009
0010 /* S2MPA01 registers */
0011 enum s2mpa01_reg {
0012     S2MPA01_REG_ID,
0013     S2MPA01_REG_INT1,
0014     S2MPA01_REG_INT2,
0015     S2MPA01_REG_INT3,
0016     S2MPA01_REG_INT1M,
0017     S2MPA01_REG_INT2M,
0018     S2MPA01_REG_INT3M,
0019     S2MPA01_REG_ST1,
0020     S2MPA01_REG_ST2,
0021     S2MPA01_REG_PWRONSRC,
0022     S2MPA01_REG_OFFSRC,
0023     S2MPA01_REG_RTC_BUF,
0024     S2MPA01_REG_CTRL1,
0025     S2MPA01_REG_ETC_TEST,
0026     S2MPA01_REG_RSVD1,
0027     S2MPA01_REG_BU_CHG,
0028     S2MPA01_REG_RAMP1,
0029     S2MPA01_REG_RAMP2,
0030     S2MPA01_REG_LDO_DSCH1,
0031     S2MPA01_REG_LDO_DSCH2,
0032     S2MPA01_REG_LDO_DSCH3,
0033     S2MPA01_REG_LDO_DSCH4,
0034     S2MPA01_REG_OTP_ADRL,
0035     S2MPA01_REG_OTP_ADRH,
0036     S2MPA01_REG_OTP_DATA,
0037     S2MPA01_REG_MON1SEL,
0038     S2MPA01_REG_MON2SEL,
0039     S2MPA01_REG_LEE,
0040     S2MPA01_REG_RSVD2,
0041     S2MPA01_REG_RSVD3,
0042     S2MPA01_REG_RSVD4,
0043     S2MPA01_REG_RSVD5,
0044     S2MPA01_REG_RSVD6,
0045     S2MPA01_REG_TOP_RSVD,
0046     S2MPA01_REG_DVS_SEL,
0047     S2MPA01_REG_DVS_PTR,
0048     S2MPA01_REG_DVS_DATA,
0049     S2MPA01_REG_RSVD_NO,
0050     S2MPA01_REG_UVLO,
0051     S2MPA01_REG_LEE_NO,
0052     S2MPA01_REG_B1CTRL1,
0053     S2MPA01_REG_B1CTRL2,
0054     S2MPA01_REG_B2CTRL1,
0055     S2MPA01_REG_B2CTRL2,
0056     S2MPA01_REG_B3CTRL1,
0057     S2MPA01_REG_B3CTRL2,
0058     S2MPA01_REG_B4CTRL1,
0059     S2MPA01_REG_B4CTRL2,
0060     S2MPA01_REG_B5CTRL1,
0061     S2MPA01_REG_B5CTRL2,
0062     S2MPA01_REG_B5CTRL3,
0063     S2MPA01_REG_B5CTRL4,
0064     S2MPA01_REG_B5CTRL5,
0065     S2MPA01_REG_B5CTRL6,
0066     S2MPA01_REG_B6CTRL1,
0067     S2MPA01_REG_B6CTRL2,
0068     S2MPA01_REG_B7CTRL1,
0069     S2MPA01_REG_B7CTRL2,
0070     S2MPA01_REG_B8CTRL1,
0071     S2MPA01_REG_B8CTRL2,
0072     S2MPA01_REG_B9CTRL1,
0073     S2MPA01_REG_B9CTRL2,
0074     S2MPA01_REG_B10CTRL1,
0075     S2MPA01_REG_B10CTRL2,
0076     S2MPA01_REG_L1CTRL,
0077     S2MPA01_REG_L2CTRL,
0078     S2MPA01_REG_L3CTRL,
0079     S2MPA01_REG_L4CTRL,
0080     S2MPA01_REG_L5CTRL,
0081     S2MPA01_REG_L6CTRL,
0082     S2MPA01_REG_L7CTRL,
0083     S2MPA01_REG_L8CTRL,
0084     S2MPA01_REG_L9CTRL,
0085     S2MPA01_REG_L10CTRL,
0086     S2MPA01_REG_L11CTRL,
0087     S2MPA01_REG_L12CTRL,
0088     S2MPA01_REG_L13CTRL,
0089     S2MPA01_REG_L14CTRL,
0090     S2MPA01_REG_L15CTRL,
0091     S2MPA01_REG_L16CTRL,
0092     S2MPA01_REG_L17CTRL,
0093     S2MPA01_REG_L18CTRL,
0094     S2MPA01_REG_L19CTRL,
0095     S2MPA01_REG_L20CTRL,
0096     S2MPA01_REG_L21CTRL,
0097     S2MPA01_REG_L22CTRL,
0098     S2MPA01_REG_L23CTRL,
0099     S2MPA01_REG_L24CTRL,
0100     S2MPA01_REG_L25CTRL,
0101     S2MPA01_REG_L26CTRL,
0102
0103     S2MPA01_REG_LDO_OVCB1,
0104     S2MPA01_REG_LDO_OVCB2,
0105     S2MPA01_REG_LDO_OVCB3,
0106     S2MPA01_REG_LDO_OVCB4,
0107
0108 };
0109
0110 /* S2MPA01 regulator ids */
0111 enum s2mpa01_regulators {
0112     S2MPA01_LDO1,
0113     S2MPA01_LDO2,
0114     S2MPA01_LDO3,
0115     S2MPA01_LDO4,
0116     S2MPA01_LDO5,
0117     S2MPA01_LDO6,
0118     S2MPA01_LDO7,
0119     S2MPA01_LDO8,
0120     S2MPA01_LDO9,
0121     S2MPA01_LDO10,
0122     S2MPA01_LDO11,
0123     S2MPA01_LDO12,
0124     S2MPA01_LDO13,
0125     S2MPA01_LDO14,
0126     S2MPA01_LDO15,
0127     S2MPA01_LDO16,
0128     S2MPA01_LDO17,
0129     S2MPA01_LDO18,
0130     S2MPA01_LDO19,
0131     S2MPA01_LDO20,
0132     S2MPA01_LDO21,
0133     S2MPA01_LDO22,
0134     S2MPA01_LDO23,
0135     S2MPA01_LDO24,
0136     S2MPA01_LDO25,
0137     S2MPA01_LDO26,
0138
0139     S2MPA01_BUCK1,
0140     S2MPA01_BUCK2,
0141     S2MPA01_BUCK3,
0142     S2MPA01_BUCK4,
0143     S2MPA01_BUCK5,
0144     S2MPA01_BUCK6,
0145     S2MPA01_BUCK7,
0146     S2MPA01_BUCK8,
0147     S2MPA01_BUCK9,
0148     S2MPA01_BUCK10,
0149
0150     S2MPA01_REGULATOR_MAX,
0151 };
0152
0153 #define S2MPA01_LDO_VSEL_MASK   0x3F
0154 #define S2MPA01_BUCK_VSEL_MASK  0xFF
0155 #define S2MPA01_ENABLE_MASK (0x03 << S2MPA01_ENABLE_SHIFT)
0156 #define S2MPA01_ENABLE_SHIFT    0x06
0157 #define S2MPA01_LDO_N_VOLTAGES  (S2MPA01_LDO_VSEL_MASK + 1)
0158 #define S2MPA01_BUCK_N_VOLTAGES (S2MPA01_BUCK_VSEL_MASK + 1)
0159
0160 #define S2MPA01_RAMP_DELAY  12500   /* uV/us */
0161
0162 #define S2MPA01_BUCK16_RAMP_SHIFT   4
0163 #define S2MPA01_BUCK24_RAMP_SHIFT   6
0164 #define S2MPA01_BUCK3_RAMP_SHIFT    4
0165 #define S2MPA01_BUCK5_RAMP_SHIFT    6
0166 #define S2MPA01_BUCK7_RAMP_SHIFT    2
0167 #define S2MPA01_BUCK8910_RAMP_SHIFT 0
0168
0169 #define S2MPA01_BUCK1_RAMP_EN_SHIFT 3
0170 #define S2MPA01_BUCK2_RAMP_EN_SHIFT 2
0171 #define S2MPA01_BUCK3_RAMP_EN_SHIFT 1
0172 #define S2MPA01_BUCK4_RAMP_EN_SHIFT 0
0173 #define S2MPA01_PMIC_EN_SHIFT   6
0174
0175 #endif /*__LINUX_MFD_S2MPA01_H */