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0007 #ifndef __LINUX_MFD_SEC_RTC_H
0008 #define __LINUX_MFD_SEC_RTC_H
0009
0010 enum s5m_rtc_reg {
0011 S5M_RTC_SEC,
0012 S5M_RTC_MIN,
0013 S5M_RTC_HOUR,
0014 S5M_RTC_WEEKDAY,
0015 S5M_RTC_DATE,
0016 S5M_RTC_MONTH,
0017 S5M_RTC_YEAR1,
0018 S5M_RTC_YEAR2,
0019 S5M_ALARM0_SEC,
0020 S5M_ALARM0_MIN,
0021 S5M_ALARM0_HOUR,
0022 S5M_ALARM0_WEEKDAY,
0023 S5M_ALARM0_DATE,
0024 S5M_ALARM0_MONTH,
0025 S5M_ALARM0_YEAR1,
0026 S5M_ALARM0_YEAR2,
0027 S5M_ALARM1_SEC,
0028 S5M_ALARM1_MIN,
0029 S5M_ALARM1_HOUR,
0030 S5M_ALARM1_WEEKDAY,
0031 S5M_ALARM1_DATE,
0032 S5M_ALARM1_MONTH,
0033 S5M_ALARM1_YEAR1,
0034 S5M_ALARM1_YEAR2,
0035 S5M_ALARM0_CONF,
0036 S5M_ALARM1_CONF,
0037 S5M_RTC_STATUS,
0038 S5M_WTSR_SMPL_CNTL,
0039 S5M_RTC_UDR_CON,
0040
0041 S5M_RTC_REG_MAX,
0042 };
0043
0044 enum s2mps_rtc_reg {
0045 S2MPS_RTC_CTRL,
0046 S2MPS_WTSR_SMPL_CNTL,
0047 S2MPS_RTC_UDR_CON,
0048 S2MPS_RSVD,
0049 S2MPS_RTC_SEC,
0050 S2MPS_RTC_MIN,
0051 S2MPS_RTC_HOUR,
0052 S2MPS_RTC_WEEKDAY,
0053 S2MPS_RTC_DATE,
0054 S2MPS_RTC_MONTH,
0055 S2MPS_RTC_YEAR,
0056 S2MPS_ALARM0_SEC,
0057 S2MPS_ALARM0_MIN,
0058 S2MPS_ALARM0_HOUR,
0059 S2MPS_ALARM0_WEEKDAY,
0060 S2MPS_ALARM0_DATE,
0061 S2MPS_ALARM0_MONTH,
0062 S2MPS_ALARM0_YEAR,
0063 S2MPS_ALARM1_SEC,
0064 S2MPS_ALARM1_MIN,
0065 S2MPS_ALARM1_HOUR,
0066 S2MPS_ALARM1_WEEKDAY,
0067 S2MPS_ALARM1_DATE,
0068 S2MPS_ALARM1_MONTH,
0069 S2MPS_ALARM1_YEAR,
0070 S2MPS_OFFSRC,
0071
0072 S2MPS_RTC_REG_MAX,
0073 };
0074
0075 #define RTC_I2C_ADDR (0x0C >> 1)
0076
0077 #define HOUR_12 (1 << 7)
0078 #define HOUR_AMPM (1 << 6)
0079 #define HOUR_PM (1 << 5)
0080 #define S5M_ALARM0_STATUS (1 << 1)
0081 #define S5M_ALARM1_STATUS (1 << 2)
0082 #define S5M_UPDATE_AD (1 << 0)
0083
0084 #define S2MPS_ALARM0_STATUS (1 << 2)
0085 #define S2MPS_ALARM1_STATUS (1 << 1)
0086
0087
0088 #define BCD_EN_SHIFT 0
0089 #define BCD_EN_MASK (1 << BCD_EN_SHIFT)
0090 #define MODEL24_SHIFT 1
0091 #define MODEL24_MASK (1 << MODEL24_SHIFT)
0092
0093 #define S5M_RTC_UDR_SHIFT 0
0094 #define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT)
0095 #define S2MPS_RTC_WUDR_SHIFT 4
0096 #define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT)
0097 #define S2MPS15_RTC_AUDR_SHIFT 4
0098 #define S2MPS15_RTC_AUDR_MASK (1 << S2MPS15_RTC_AUDR_SHIFT)
0099 #define S2MPS13_RTC_AUDR_SHIFT 1
0100 #define S2MPS13_RTC_AUDR_MASK (1 << S2MPS13_RTC_AUDR_SHIFT)
0101 #define S2MPS15_RTC_WUDR_SHIFT 1
0102 #define S2MPS15_RTC_WUDR_MASK (1 << S2MPS15_RTC_WUDR_SHIFT)
0103 #define S2MPS_RTC_RUDR_SHIFT 0
0104 #define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT)
0105 #define RTC_TCON_SHIFT 1
0106 #define RTC_TCON_MASK (1 << RTC_TCON_SHIFT)
0107 #define S5M_RTC_TIME_EN_SHIFT 3
0108 #define S5M_RTC_TIME_EN_MASK (1 << S5M_RTC_TIME_EN_SHIFT)
0109
0110
0111
0112
0113 #define S5M_RTC_UDR_T_SHIFT 6
0114 #define S5M_RTC_UDR_T_MASK (0x3 << S5M_RTC_UDR_T_SHIFT)
0115 #define S5M_RTC_UDR_T_7320_US (0x0 << S5M_RTC_UDR_T_SHIFT)
0116 #define S5M_RTC_UDR_T_1830_US (0x1 << S5M_RTC_UDR_T_SHIFT)
0117 #define S5M_RTC_UDR_T_3660_US (0x2 << S5M_RTC_UDR_T_SHIFT)
0118 #define S5M_RTC_UDR_T_450_US (0x3 << S5M_RTC_UDR_T_SHIFT)
0119
0120
0121 #define HOUR_PM_SHIFT 6
0122 #define HOUR_PM_MASK (1 << HOUR_PM_SHIFT)
0123
0124 #define ALARM_ENABLE_SHIFT 7
0125 #define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT)
0126
0127 #define SMPL_ENABLE_SHIFT 7
0128 #define SMPL_ENABLE_MASK (1 << SMPL_ENABLE_SHIFT)
0129
0130 #define WTSR_ENABLE_SHIFT 6
0131 #define WTSR_ENABLE_MASK (1 << WTSR_ENABLE_SHIFT)
0132
0133 #endif