linux/mfd/mxs-lradc.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Freescale MXS Low Resolution Analog-to-Digital Converter driver
0004  *
0005  * Copyright (c) 2012 DENX Software Engineering, GmbH.
0006  * Copyright (c) 2016 Ksenija Stanojevic <ksenija.stanojevic@gmail.com>
0007  *
0008  * Author: Marek Vasut <marex@denx.de>
0009  */
0010
0011 #ifndef __MFD_MXS_LRADC_H
0012 #define __MFD_MXS_LRADC_H
0013
0014 #include <linux/bitops.h>
0015 #include <linux/io.h>
0016 #include <linux/stmp_device.h>
0017
0018 #define LRADC_MAX_DELAY_CHANS   4
0019 #define LRADC_MAX_MAPPED_CHANS  8
0020 #define LRADC_MAX_TOTAL_CHANS   16
0021
0022 #define LRADC_DELAY_TIMER_HZ    2000
0023
0024 #define LRADC_CTRL0             0x00
0025 # define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE   BIT(23)
0026 # define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22)
0027 # define LRADC_CTRL0_MX28_YNNSW /* YM */    BIT(21)
0028 # define LRADC_CTRL0_MX28_YPNSW /* YP */    BIT(20)
0029 # define LRADC_CTRL0_MX28_YPPSW /* YP */    BIT(19)
0030 # define LRADC_CTRL0_MX28_XNNSW /* XM */    BIT(18)
0031 # define LRADC_CTRL0_MX28_XNPSW /* XM */    BIT(17)
0032 # define LRADC_CTRL0_MX28_XPPSW /* XP */    BIT(16)
0033
0034 # define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE   BIT(20)
0035 # define LRADC_CTRL0_MX23_YM            BIT(19)
0036 # define LRADC_CTRL0_MX23_XM            BIT(18)
0037 # define LRADC_CTRL0_MX23_YP            BIT(17)
0038 # define LRADC_CTRL0_MX23_XP            BIT(16)
0039
0040 # define LRADC_CTRL0_MX28_PLATE_MASK \
0041         (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
0042         LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
0043         LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
0044         LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
0045
0046 # define LRADC_CTRL0_MX23_PLATE_MASK \
0047         (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
0048         LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
0049         LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
0050
0051 #define LRADC_CTRL1             0x10
0052 #define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN     BIT(24)
0053 #define LRADC_CTRL1_LRADC_IRQ_EN(n)     (1 << ((n) + 16))
0054 #define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK  (0x1fff << 16)
0055 #define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK  (0x01ff << 16)
0056 #define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET     16
0057 #define LRADC_CTRL1_TOUCH_DETECT_IRQ        BIT(8)
0058 #define LRADC_CTRL1_LRADC_IRQ(n)        BIT(n)
0059 #define LRADC_CTRL1_MX28_LRADC_IRQ_MASK     0x1fff
0060 #define LRADC_CTRL1_MX23_LRADC_IRQ_MASK     0x01ff
0061 #define LRADC_CTRL1_LRADC_IRQ_OFFSET        0
0062
0063 #define LRADC_CTRL2             0x20
0064 #define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET    24
0065 #define LRADC_CTRL2_TEMPSENSE_PWD       BIT(15)
0066
0067 #define LRADC_STATUS                0x40
0068 #define LRADC_STATUS_TOUCH_DETECT_RAW       BIT(0)
0069
0070 #define LRADC_CH(n)             (0x50 + (0x10 * (n)))
0071 #define LRADC_CH_ACCUMULATE         BIT(29)
0072 #define LRADC_CH_NUM_SAMPLES_MASK       (0x1f << 24)
0073 #define LRADC_CH_NUM_SAMPLES_OFFSET     24
0074 #define LRADC_CH_NUM_SAMPLES(x) \
0075                 ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
0076 #define LRADC_CH_VALUE_MASK         0x3ffff
0077 #define LRADC_CH_VALUE_OFFSET           0
0078
0079 #define LRADC_DELAY(n)              (0xd0 + (0x10 * (n)))
0080 #define LRADC_DELAY_TRIGGER_LRADCS_MASK     (0xffUL << 24)
0081 #define LRADC_DELAY_TRIGGER_LRADCS_OFFSET   24
0082 #define LRADC_DELAY_TRIGGER(x) \
0083                 (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
0084                 LRADC_DELAY_TRIGGER_LRADCS_MASK)
0085 #define LRADC_DELAY_KICK            BIT(20)
0086 #define LRADC_DELAY_TRIGGER_DELAYS_MASK     (0xf << 16)
0087 #define LRADC_DELAY_TRIGGER_DELAYS_OFFSET   16
0088 #define LRADC_DELAY_TRIGGER_DELAYS(x) \
0089                 (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
0090                 LRADC_DELAY_TRIGGER_DELAYS_MASK)
0091 #define LRADC_DELAY_LOOP_COUNT_MASK     (0x1f << 11)
0092 #define LRADC_DELAY_LOOP_COUNT_OFFSET       11
0093 #define LRADC_DELAY_LOOP(x) \
0094                 (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
0095                 LRADC_DELAY_LOOP_COUNT_MASK)
0096 #define LRADC_DELAY_DELAY_MASK          0x7ff
0097 #define LRADC_DELAY_DELAY_OFFSET        0
0098 #define LRADC_DELAY_DELAY(x) \
0099                 (((x) << LRADC_DELAY_DELAY_OFFSET) & \
0100                 LRADC_DELAY_DELAY_MASK)
0101
0102 #define LRADC_CTRL4             0x140
0103 #define LRADC_CTRL4_LRADCSELECT_MASK(n)     (0xf << ((n) * 4))
0104 #define LRADC_CTRL4_LRADCSELECT_OFFSET(n)   ((n) * 4)
0105 #define LRADC_CTRL4_LRADCSELECT(n, x) \
0106                 (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \
0107                 LRADC_CTRL4_LRADCSELECT_MASK(n))
0108
0109 #define LRADC_RESOLUTION            12
0110 #define LRADC_SINGLE_SAMPLE_MASK        ((1 << LRADC_RESOLUTION) - 1)
0111
0112 #define BUFFER_VCHANS_LIMITED       0x3f
0113 #define BUFFER_VCHANS_ALL       0xff
0114
0115     /*
0116      * Certain LRADC channels are shared between touchscreen
0117      * and/or touch-buttons and generic LRADC block. Therefore when using
0118      * either of these, these channels are not available for the regular
0119      * sampling. The shared channels are as follows:
0120      *
0121      * CH0 -- Touch button #0
0122      * CH1 -- Touch button #1
0123      * CH2 -- Touch screen XPUL
0124      * CH3 -- Touch screen YPLL
0125      * CH4 -- Touch screen XNUL
0126      * CH5 -- Touch screen YNLR
0127      * CH6 -- Touch screen WIPER (5-wire only)
0128      *
0129      * The bit fields below represents which parts of the LRADC block are
0130      * switched into special mode of operation. These channels can not
0131      * be sampled as regular LRADC channels. The driver will refuse any
0132      * attempt to sample these channels.
0133      */
0134 #define CHAN_MASK_TOUCHBUTTON       (BIT(1) | BIT(0))
0135 #define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
0136 #define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
0137
0138 enum mxs_lradc_id {
0139     IMX23_LRADC,
0140     IMX28_LRADC,
0141 };
0142
0143 enum mxs_lradc_ts_wires {
0144     MXS_LRADC_TOUCHSCREEN_NONE = 0,
0145     MXS_LRADC_TOUCHSCREEN_4WIRE,
0146     MXS_LRADC_TOUCHSCREEN_5WIRE,
0147 };
0148
0149 /**
0150  * struct mxs_lradc
0151  * @soc: soc type (IMX23 or IMX28)
0152  * @clk: 2 kHz clock for delay units
0153  * @buffer_vchans: channels that can be used during buffered capture
0154  * @touchscreen_wire: touchscreen type (4-wire or 5-wire)
0155  * @use_touchbutton: button state (on or off)
0156  */
0157 struct mxs_lradc {
0158     enum mxs_lradc_id   soc;
0159     struct clk      *clk;
0160     u8          buffer_vchans;
0161
0162     enum mxs_lradc_ts_wires touchscreen_wire;
0163     bool            use_touchbutton;
0164 };
0165
0166 static inline u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc)
0167 {
0168     switch (lradc->soc) {
0169     case IMX23_LRADC:
0170         return LRADC_CTRL1_MX23_LRADC_IRQ_MASK;
0171     case IMX28_LRADC:
0172         return LRADC_CTRL1_MX28_LRADC_IRQ_MASK;
0173     default:
0174         return 0;
0175     }
0176 }
0177
0178 #endif /* __MXS_LRADC_H */