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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com>
0004  */
0005 
0006 #ifndef __MFD_MT6323_CORE_H__
0007 #define __MFD_MT6323_CORE_H__
0008 
0009 enum MT6323_IRQ_STATUS_numbers {
0010     MT6323_IRQ_STATUS_SPKL_AB = 0,
0011     MT6323_IRQ_STATUS_SPKL,
0012     MT6323_IRQ_STATUS_BAT_L,
0013     MT6323_IRQ_STATUS_BAT_H,
0014     MT6323_IRQ_STATUS_WATCHDOG,
0015     MT6323_IRQ_STATUS_PWRKEY,
0016     MT6323_IRQ_STATUS_THR_L,
0017     MT6323_IRQ_STATUS_THR_H,
0018     MT6323_IRQ_STATUS_VBATON_UNDET,
0019     MT6323_IRQ_STATUS_BVALID_DET,
0020     MT6323_IRQ_STATUS_CHRDET,
0021     MT6323_IRQ_STATUS_OV,
0022     MT6323_IRQ_STATUS_LDO = 16,
0023     MT6323_IRQ_STATUS_FCHRKEY,
0024     MT6323_IRQ_STATUS_ACCDET,
0025     MT6323_IRQ_STATUS_AUDIO,
0026     MT6323_IRQ_STATUS_RTC,
0027     MT6323_IRQ_STATUS_VPROC,
0028     MT6323_IRQ_STATUS_VSYS,
0029     MT6323_IRQ_STATUS_VPA,
0030     MT6323_IRQ_STATUS_NR,
0031 };
0032 
0033 #endif /* __MFD_MT6323_CORE_H__ */