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0006 #ifndef __LINUX_MFD_MC13XXX_H
0007 #define __LINUX_MFD_MC13XXX_H
0008
0009 #include <linux/interrupt.h>
0010
0011 struct mc13xxx;
0012
0013 void mc13xxx_lock(struct mc13xxx *mc13xxx);
0014 void mc13xxx_unlock(struct mc13xxx *mc13xxx);
0015
0016 int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val);
0017 int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val);
0018 int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
0019 u32 mask, u32 val);
0020
0021 int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
0022 irq_handler_t handler, const char *name, void *dev);
0023 int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev);
0024
0025 int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
0026 int *enabled, int *pending);
0027
0028 int mc13xxx_get_flags(struct mc13xxx *mc13xxx);
0029
0030 int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx,
0031 unsigned int mode, unsigned int channel,
0032 u8 ato, bool atox, unsigned int *sample);
0033
0034
0035 static inline int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq)
0036 {
0037 return 0;
0038 }
0039
0040 static inline int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq,
0041 irq_handler_t handler,
0042 const char *name, void *dev)
0043 {
0044 return mc13xxx_irq_request(mc13xxx, irq, handler, name, dev);
0045 }
0046
0047 int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq);
0048 int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq);
0049
0050 #define MC13783_AUDIO_RX0 36
0051 #define MC13783_AUDIO_RX1 37
0052 #define MC13783_AUDIO_TX 38
0053 #define MC13783_SSI_NETWORK 39
0054 #define MC13783_AUDIO_CODEC 40
0055 #define MC13783_AUDIO_DAC 41
0056
0057 #define MC13XXX_IRQ_ADCDONE 0
0058 #define MC13XXX_IRQ_ADCBISDONE 1
0059 #define MC13XXX_IRQ_TS 2
0060 #define MC13XXX_IRQ_CHGDET 6
0061 #define MC13XXX_IRQ_CHGREV 8
0062 #define MC13XXX_IRQ_CHGSHORT 9
0063 #define MC13XXX_IRQ_CCCV 10
0064 #define MC13XXX_IRQ_CHGCURR 11
0065 #define MC13XXX_IRQ_BPON 12
0066 #define MC13XXX_IRQ_LOBATL 13
0067 #define MC13XXX_IRQ_LOBATH 14
0068 #define MC13XXX_IRQ_1HZ 24
0069 #define MC13XXX_IRQ_TODA 25
0070 #define MC13XXX_IRQ_SYSRST 30
0071 #define MC13XXX_IRQ_RTCRST 31
0072 #define MC13XXX_IRQ_PC 32
0073 #define MC13XXX_IRQ_WARM 33
0074 #define MC13XXX_IRQ_MEMHLD 34
0075 #define MC13XXX_IRQ_THWARNL 36
0076 #define MC13XXX_IRQ_THWARNH 37
0077 #define MC13XXX_IRQ_CLK 38
0078
0079 struct regulator_init_data;
0080
0081 struct mc13xxx_regulator_init_data {
0082 int id;
0083 struct regulator_init_data *init_data;
0084 struct device_node *node;
0085 };
0086
0087 struct mc13xxx_regulator_platform_data {
0088 int num_regulators;
0089 struct mc13xxx_regulator_init_data *regulators;
0090 };
0091
0092 enum {
0093
0094 MC13783_LED_MD,
0095 MC13783_LED_AD,
0096 MC13783_LED_KP,
0097 MC13783_LED_R1,
0098 MC13783_LED_G1,
0099 MC13783_LED_B1,
0100 MC13783_LED_R2,
0101 MC13783_LED_G2,
0102 MC13783_LED_B2,
0103 MC13783_LED_R3,
0104 MC13783_LED_G3,
0105 MC13783_LED_B3,
0106
0107 MC13892_LED_MD,
0108 MC13892_LED_AD,
0109 MC13892_LED_KP,
0110 MC13892_LED_R,
0111 MC13892_LED_G,
0112 MC13892_LED_B,
0113
0114 MC34708_LED_R,
0115 MC34708_LED_G,
0116 };
0117
0118 struct mc13xxx_led_platform_data {
0119 int id;
0120 const char *name;
0121 const char *default_trigger;
0122 };
0123
0124 #define MAX_LED_CONTROL_REGS 6
0125
0126
0127 #define MC13783_LED_C0_ENABLE (1 << 0)
0128 #define MC13783_LED_C0_TRIODE_MD (1 << 7)
0129 #define MC13783_LED_C0_TRIODE_AD (1 << 8)
0130 #define MC13783_LED_C0_TRIODE_KP (1 << 9)
0131 #define MC13783_LED_C0_BOOST (1 << 10)
0132 #define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11)
0133 #define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14)
0134
0135 #define MC13783_LED_C1_TC1HALF (1 << 18)
0136 #define MC13783_LED_C1_SLEWLIM (1 << 23)
0137
0138 #define MC13783_LED_C2_CURRENT_MD(x) (((x) & 0x7) << 0)
0139 #define MC13783_LED_C2_CURRENT_AD(x) (((x) & 0x7) << 3)
0140 #define MC13783_LED_C2_CURRENT_KP(x) (((x) & 0x7) << 6)
0141 #define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21)
0142 #define MC13783_LED_C2_SLEWLIM (1 << 23)
0143
0144 #define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0)
0145 #define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2)
0146 #define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4)
0147 #define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21)
0148 #define MC13783_LED_C3_TRIODE_TC1 (1 << 23)
0149
0150 #define MC13783_LED_C4_CURRENT_R2(x) (((x) & 0x3) << 0)
0151 #define MC13783_LED_C4_CURRENT_G2(x) (((x) & 0x3) << 2)
0152 #define MC13783_LED_C4_CURRENT_B2(x) (((x) & 0x3) << 4)
0153 #define MC13783_LED_C4_PERIOD(x) (((x) & 0x3) << 21)
0154 #define MC13783_LED_C4_TRIODE_TC2 (1 << 23)
0155
0156 #define MC13783_LED_C5_CURRENT_R3(x) (((x) & 0x3) << 0)
0157 #define MC13783_LED_C5_CURRENT_G3(x) (((x) & 0x3) << 2)
0158 #define MC13783_LED_C5_CURRENT_B3(x) (((x) & 0x3) << 4)
0159 #define MC13783_LED_C5_PERIOD(x) (((x) & 0x3) << 21)
0160 #define MC13783_LED_C5_TRIODE_TC3 (1 << 23)
0161
0162 #define MC13892_LED_C0_CURRENT_MD(x) (((x) & 0x7) << 9)
0163 #define MC13892_LED_C0_CURRENT_AD(x) (((x) & 0x7) << 21)
0164
0165 #define MC13892_LED_C1_CURRENT_KP(x) (((x) & 0x7) << 9)
0166
0167 #define MC13892_LED_C2_CURRENT_R(x) (((x) & 0x7) << 9)
0168 #define MC13892_LED_C2_CURRENT_G(x) (((x) & 0x7) << 21)
0169
0170 #define MC13892_LED_C3_CURRENT_B(x) (((x) & 0x7) << 9)
0171
0172 #define MC34708_LED_C0_CURRENT_R(x) (((x) & 0x3) << 9)
0173 #define MC34708_LED_C0_CURRENT_G(x) (((x) & 0x3) << 21)
0174
0175 struct mc13xxx_leds_platform_data {
0176 struct mc13xxx_led_platform_data *led;
0177 int num_leds;
0178 u32 led_control[MAX_LED_CONTROL_REGS];
0179 };
0180
0181 #define MC13783_BUTTON_DBNC_0MS 0
0182 #define MC13783_BUTTON_DBNC_30MS 1
0183 #define MC13783_BUTTON_DBNC_150MS 2
0184 #define MC13783_BUTTON_DBNC_750MS 3
0185 #define MC13783_BUTTON_ENABLE (1 << 2)
0186 #define MC13783_BUTTON_POL_INVERT (1 << 3)
0187 #define MC13783_BUTTON_RESET_EN (1 << 4)
0188
0189 struct mc13xxx_buttons_platform_data {
0190 int b1on_flags;
0191 unsigned short b1on_key;
0192 int b2on_flags;
0193 unsigned short b2on_key;
0194 int b3on_flags;
0195 unsigned short b3on_key;
0196 };
0197
0198 #define MC13783_TS_ATO_FIRST false
0199 #define MC13783_TS_ATO_EACH true
0200
0201 struct mc13xxx_ts_platform_data {
0202
0203
0204
0205 u8 ato;
0206
0207 bool atox;
0208 };
0209
0210 enum mc13783_ssi_port {
0211 MC13783_SSI1_PORT,
0212 MC13783_SSI2_PORT,
0213 };
0214
0215 struct mc13xxx_codec_platform_data {
0216 enum mc13783_ssi_port adc_ssi_port;
0217 enum mc13783_ssi_port dac_ssi_port;
0218 };
0219
0220 #define MC13XXX_USE_TOUCHSCREEN (1 << 0)
0221 #define MC13XXX_USE_CODEC (1 << 1)
0222 #define MC13XXX_USE_ADC (1 << 2)
0223 #define MC13XXX_USE_RTC (1 << 3)
0224
0225 struct mc13xxx_platform_data {
0226 unsigned int flags;
0227
0228 struct mc13xxx_regulator_platform_data regulators;
0229 struct mc13xxx_leds_platform_data *leds;
0230 struct mc13xxx_buttons_platform_data *buttons;
0231 struct mc13xxx_ts_platform_data touch;
0232 struct mc13xxx_codec_platform_data *codec;
0233 };
0234
0235 #define MC13XXX_ADC_MODE_TS 1
0236 #define MC13XXX_ADC_MODE_SINGLE_CHAN 2
0237 #define MC13XXX_ADC_MODE_MULT_CHAN 3
0238
0239 #define MC13XXX_ADC0 43
0240 #define MC13XXX_ADC0_LICELLCON (1 << 0)
0241 #define MC13XXX_ADC0_CHRGICON (1 << 1)
0242 #define MC13XXX_ADC0_BATICON (1 << 2)
0243 #define MC13XXX_ADC0_ADIN7SEL_DIE (1 << 4)
0244 #define MC13XXX_ADC0_ADIN7SEL_UID (2 << 4)
0245 #define MC13XXX_ADC0_ADREFEN (1 << 10)
0246 #define MC13XXX_ADC0_TSMOD0 (1 << 12)
0247 #define MC13XXX_ADC0_TSMOD1 (1 << 13)
0248 #define MC13XXX_ADC0_TSMOD2 (1 << 14)
0249 #define MC13XXX_ADC0_CHRGRAWDIV (1 << 15)
0250 #define MC13XXX_ADC0_ADINC1 (1 << 16)
0251 #define MC13XXX_ADC0_ADINC2 (1 << 17)
0252
0253 #define MC13XXX_ADC0_TSMOD_MASK (MC13XXX_ADC0_TSMOD0 | \
0254 MC13XXX_ADC0_TSMOD1 | \
0255 MC13XXX_ADC0_TSMOD2)
0256
0257 #define MC13XXX_ADC0_CONFIG_MASK (MC13XXX_ADC0_TSMOD_MASK | \
0258 MC13XXX_ADC0_LICELLCON | \
0259 MC13XXX_ADC0_CHRGICON | \
0260 MC13XXX_ADC0_BATICON)
0261
0262 #endif