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0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * max8998-private.h - Voltage regulator driver for the Maxim 8998
0004  *
0005  *  Copyright (C) 2009-2010 Samsung Electrnoics
0006  *  Kyungmin Park <kyungmin.park@samsung.com>
0007  *  Marek Szyprowski <m.szyprowski@samsung.com>
0008  */
0009 
0010 #ifndef __LINUX_MFD_MAX8998_PRIV_H
0011 #define __LINUX_MFD_MAX8998_PRIV_H
0012 
0013 #define MAX8998_NUM_IRQ_REGS    4
0014 
0015 /* MAX 8998 registers */
0016 enum {
0017     MAX8998_REG_IRQ1,
0018     MAX8998_REG_IRQ2,
0019     MAX8998_REG_IRQ3,
0020     MAX8998_REG_IRQ4,
0021     MAX8998_REG_IRQM1,
0022     MAX8998_REG_IRQM2,
0023     MAX8998_REG_IRQM3,
0024     MAX8998_REG_IRQM4,
0025     MAX8998_REG_STATUS1,
0026     MAX8998_REG_STATUS2,
0027     MAX8998_REG_STATUSM1,
0028     MAX8998_REG_STATUSM2,
0029     MAX8998_REG_CHGR1,
0030     MAX8998_REG_CHGR2,
0031     MAX8998_REG_LDO_ACTIVE_DISCHARGE1,
0032     MAX8998_REG_LDO_ACTIVE_DISCHARGE2,
0033     MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
0034     MAX8998_REG_ONOFF1,
0035     MAX8998_REG_ONOFF2,
0036     MAX8998_REG_ONOFF3,
0037     MAX8998_REG_ONOFF4,
0038     MAX8998_REG_BUCK1_VOLTAGE1,
0039     MAX8998_REG_BUCK1_VOLTAGE2,
0040     MAX8998_REG_BUCK1_VOLTAGE3,
0041     MAX8998_REG_BUCK1_VOLTAGE4,
0042     MAX8998_REG_BUCK2_VOLTAGE1,
0043     MAX8998_REG_BUCK2_VOLTAGE2,
0044     MAX8998_REG_BUCK3,
0045     MAX8998_REG_BUCK4,
0046     MAX8998_REG_LDO2_LDO3,
0047     MAX8998_REG_LDO4,
0048     MAX8998_REG_LDO5,
0049     MAX8998_REG_LDO6,
0050     MAX8998_REG_LDO7,
0051     MAX8998_REG_LDO8_LDO9,
0052     MAX8998_REG_LDO10_LDO11,
0053     MAX8998_REG_LDO12,
0054     MAX8998_REG_LDO13,
0055     MAX8998_REG_LDO14,
0056     MAX8998_REG_LDO15,
0057     MAX8998_REG_LDO16,
0058     MAX8998_REG_LDO17,
0059     MAX8998_REG_BKCHR,
0060     MAX8998_REG_LBCNFG1,
0061     MAX8998_REG_LBCNFG2,
0062 };
0063 
0064 /* IRQ definitions */
0065 enum {
0066     MAX8998_IRQ_DCINF,
0067     MAX8998_IRQ_DCINR,
0068     MAX8998_IRQ_JIGF,
0069     MAX8998_IRQ_JIGR,
0070     MAX8998_IRQ_PWRONF,
0071     MAX8998_IRQ_PWRONR,
0072 
0073     MAX8998_IRQ_WTSREVNT,
0074     MAX8998_IRQ_SMPLEVNT,
0075     MAX8998_IRQ_ALARM1,
0076     MAX8998_IRQ_ALARM0,
0077 
0078     MAX8998_IRQ_ONKEY1S,
0079     MAX8998_IRQ_TOPOFFR,
0080     MAX8998_IRQ_DCINOVPR,
0081     MAX8998_IRQ_CHGRSTF,
0082     MAX8998_IRQ_DONER,
0083     MAX8998_IRQ_CHGFAULT,
0084 
0085     MAX8998_IRQ_LOBAT1,
0086     MAX8998_IRQ_LOBAT2,
0087 
0088     MAX8998_IRQ_NR,
0089 };
0090 
0091 /* MAX8998 various variants */
0092 enum {
0093     TYPE_MAX8998 = 0, /* Default */
0094     TYPE_LP3974,    /* National version of MAX8998 */
0095     TYPE_LP3979,    /* Added AVS */
0096 };
0097 
0098 #define MAX8998_IRQ_DCINF_MASK      (1 << 2)
0099 #define MAX8998_IRQ_DCINR_MASK      (1 << 3)
0100 #define MAX8998_IRQ_JIGF_MASK       (1 << 4)
0101 #define MAX8998_IRQ_JIGR_MASK       (1 << 5)
0102 #define MAX8998_IRQ_PWRONF_MASK     (1 << 6)
0103 #define MAX8998_IRQ_PWRONR_MASK     (1 << 7)
0104 
0105 #define MAX8998_IRQ_WTSREVNT_MASK   (1 << 0)
0106 #define MAX8998_IRQ_SMPLEVNT_MASK   (1 << 1)
0107 #define MAX8998_IRQ_ALARM1_MASK     (1 << 2)
0108 #define MAX8998_IRQ_ALARM0_MASK     (1 << 3)
0109 
0110 #define MAX8998_IRQ_ONKEY1S_MASK    (1 << 0)
0111 #define MAX8998_IRQ_TOPOFFR_MASK    (1 << 2)
0112 #define MAX8998_IRQ_DCINOVPR_MASK   (1 << 3)
0113 #define MAX8998_IRQ_CHGRSTF_MASK    (1 << 4)
0114 #define MAX8998_IRQ_DONER_MASK      (1 << 5)
0115 #define MAX8998_IRQ_CHGFAULT_MASK   (1 << 7)
0116 
0117 #define MAX8998_IRQ_LOBAT1_MASK     (1 << 0)
0118 #define MAX8998_IRQ_LOBAT2_MASK     (1 << 1)
0119 
0120 #define MAX8998_ENRAMP                  (1 << 4)
0121 
0122 struct irq_domain;
0123 
0124 /**
0125  * struct max8998_dev - max8998 master device for sub-drivers
0126  * @dev: master device of the chip (can be used to access platform data)
0127  * @pdata: platform data for the driver and subdrivers
0128  * @i2c: i2c client private data for regulator
0129  * @rtc: i2c client private data for rtc
0130  * @iolock: mutex for serializing io access
0131  * @irqlock: mutex for buslock
0132  * @irq_base: base IRQ number for max8998, required for IRQs
0133  * @irq: generic IRQ number for max8998
0134  * @ono: power onoff IRQ number for max8998
0135  * @irq_masks_cur: currently active value
0136  * @irq_masks_cache: cached hardware value
0137  * @type: indicate which max8998 "variant" is used
0138  */
0139 struct max8998_dev {
0140     struct device *dev;
0141     struct max8998_platform_data *pdata;
0142     struct i2c_client *i2c;
0143     struct i2c_client *rtc;
0144     struct mutex iolock;
0145     struct mutex irqlock;
0146 
0147     unsigned int irq_base;
0148     struct irq_domain *irq_domain;
0149     int irq;
0150     int ono;
0151     u8 irq_masks_cur[MAX8998_NUM_IRQ_REGS];
0152     u8 irq_masks_cache[MAX8998_NUM_IRQ_REGS];
0153     unsigned long type;
0154     bool wakeup;
0155 };
0156 
0157 int max8998_irq_init(struct max8998_dev *max8998);
0158 void max8998_irq_exit(struct max8998_dev *max8998);
0159 int max8998_irq_resume(struct max8998_dev *max8998);
0160 
0161 extern int max8998_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest);
0162 extern int max8998_bulk_read(struct i2c_client *i2c, u8 reg, int count,
0163         u8 *buf);
0164 extern int max8998_write_reg(struct i2c_client *i2c, u8 reg, u8 value);
0165 extern int max8998_bulk_write(struct i2c_client *i2c, u8 reg, int count,
0166         u8 *buf);
0167 extern int max8998_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask);
0168 
0169 #endif /*  __LINUX_MFD_MAX8998_PRIV_H */