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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Functions to access MAX8907 power management chip.
0004  *
0005  * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
0006  * Copyright (C) 2012, NVIDIA CORPORATION. All rights reserved.
0007  */
0008 
0009 #ifndef __LINUX_MFD_MAX8907_H
0010 #define __LINUX_MFD_MAX8907_H
0011 
0012 #include <linux/mutex.h>
0013 #include <linux/pm.h>
0014 
0015 #define MAX8907_GEN_I2C_ADDR        (0x78 >> 1)
0016 #define MAX8907_ADC_I2C_ADDR        (0x8e >> 1)
0017 #define MAX8907_RTC_I2C_ADDR        (0xd0 >> 1)
0018 
0019 /* MAX8907 register map */
0020 #define MAX8907_REG_SYSENSEL        0x00
0021 #define MAX8907_REG_ON_OFF_IRQ1     0x01
0022 #define MAX8907_REG_ON_OFF_IRQ1_MASK    0x02
0023 #define MAX8907_REG_ON_OFF_STAT     0x03
0024 #define MAX8907_REG_SDCTL1      0x04
0025 #define MAX8907_REG_SDSEQCNT1       0x05
0026 #define MAX8907_REG_SDV1        0x06
0027 #define MAX8907_REG_SDCTL2      0x07
0028 #define MAX8907_REG_SDSEQCNT2       0x08
0029 #define MAX8907_REG_SDV2        0x09
0030 #define MAX8907_REG_SDCTL3      0x0A
0031 #define MAX8907_REG_SDSEQCNT3       0x0B
0032 #define MAX8907_REG_SDV3        0x0C
0033 #define MAX8907_REG_ON_OFF_IRQ2     0x0D
0034 #define MAX8907_REG_ON_OFF_IRQ2_MASK    0x0E
0035 #define MAX8907_REG_RESET_CNFG      0x0F
0036 #define MAX8907_REG_LDOCTL16        0x10
0037 #define MAX8907_REG_LDOSEQCNT16     0x11
0038 #define MAX8907_REG_LDO16VOUT       0x12
0039 #define MAX8907_REG_SDBYSEQCNT      0x13
0040 #define MAX8907_REG_LDOCTL17        0x14
0041 #define MAX8907_REG_LDOSEQCNT17     0x15
0042 #define MAX8907_REG_LDO17VOUT       0x16
0043 #define MAX8907_REG_LDOCTL1     0x18
0044 #define MAX8907_REG_LDOSEQCNT1      0x19
0045 #define MAX8907_REG_LDO1VOUT        0x1A
0046 #define MAX8907_REG_LDOCTL2     0x1C
0047 #define MAX8907_REG_LDOSEQCNT2      0x1D
0048 #define MAX8907_REG_LDO2VOUT        0x1E
0049 #define MAX8907_REG_LDOCTL3     0x20
0050 #define MAX8907_REG_LDOSEQCNT3      0x21
0051 #define MAX8907_REG_LDO3VOUT        0x22
0052 #define MAX8907_REG_LDOCTL4     0x24
0053 #define MAX8907_REG_LDOSEQCNT4      0x25
0054 #define MAX8907_REG_LDO4VOUT        0x26
0055 #define MAX8907_REG_LDOCTL5     0x28
0056 #define MAX8907_REG_LDOSEQCNT5      0x29
0057 #define MAX8907_REG_LDO5VOUT        0x2A
0058 #define MAX8907_REG_LDOCTL6     0x2C
0059 #define MAX8907_REG_LDOSEQCNT6      0x2D
0060 #define MAX8907_REG_LDO6VOUT        0x2E
0061 #define MAX8907_REG_LDOCTL7     0x30
0062 #define MAX8907_REG_LDOSEQCNT7      0x31
0063 #define MAX8907_REG_LDO7VOUT        0x32
0064 #define MAX8907_REG_LDOCTL8     0x34
0065 #define MAX8907_REG_LDOSEQCNT8      0x35
0066 #define MAX8907_REG_LDO8VOUT        0x36
0067 #define MAX8907_REG_LDOCTL9     0x38
0068 #define MAX8907_REG_LDOSEQCNT9      0x39
0069 #define MAX8907_REG_LDO9VOUT        0x3A
0070 #define MAX8907_REG_LDOCTL10        0x3C
0071 #define MAX8907_REG_LDOSEQCNT10     0x3D
0072 #define MAX8907_REG_LDO10VOUT       0x3E
0073 #define MAX8907_REG_LDOCTL11        0x40
0074 #define MAX8907_REG_LDOSEQCNT11     0x41
0075 #define MAX8907_REG_LDO11VOUT       0x42
0076 #define MAX8907_REG_LDOCTL12        0x44
0077 #define MAX8907_REG_LDOSEQCNT12     0x45
0078 #define MAX8907_REG_LDO12VOUT       0x46
0079 #define MAX8907_REG_LDOCTL13        0x48
0080 #define MAX8907_REG_LDOSEQCNT13     0x49
0081 #define MAX8907_REG_LDO13VOUT       0x4A
0082 #define MAX8907_REG_LDOCTL14        0x4C
0083 #define MAX8907_REG_LDOSEQCNT14     0x4D
0084 #define MAX8907_REG_LDO14VOUT       0x4E
0085 #define MAX8907_REG_LDOCTL15        0x50
0086 #define MAX8907_REG_LDOSEQCNT15     0x51
0087 #define MAX8907_REG_LDO15VOUT       0x52
0088 #define MAX8907_REG_OUT5VEN     0x54
0089 #define MAX8907_REG_OUT5VSEQ        0x55
0090 #define MAX8907_REG_OUT33VEN        0x58
0091 #define MAX8907_REG_OUT33VSEQ       0x59
0092 #define MAX8907_REG_LDOCTL19        0x5C
0093 #define MAX8907_REG_LDOSEQCNT19     0x5D
0094 #define MAX8907_REG_LDO19VOUT       0x5E
0095 #define MAX8907_REG_LBCNFG      0x60
0096 #define MAX8907_REG_SEQ1CNFG        0x64
0097 #define MAX8907_REG_SEQ2CNFG        0x65
0098 #define MAX8907_REG_SEQ3CNFG        0x66
0099 #define MAX8907_REG_SEQ4CNFG        0x67
0100 #define MAX8907_REG_SEQ5CNFG        0x68
0101 #define MAX8907_REG_SEQ6CNFG        0x69
0102 #define MAX8907_REG_SEQ7CNFG        0x6A
0103 #define MAX8907_REG_LDOCTL18        0x72
0104 #define MAX8907_REG_LDOSEQCNT18     0x73
0105 #define MAX8907_REG_LDO18VOUT       0x74
0106 #define MAX8907_REG_BBAT_CNFG       0x78
0107 #define MAX8907_REG_CHG_CNTL1       0x7C
0108 #define MAX8907_REG_CHG_CNTL2       0x7D
0109 #define MAX8907_REG_CHG_IRQ1        0x7E
0110 #define MAX8907_REG_CHG_IRQ2        0x7F
0111 #define MAX8907_REG_CHG_IRQ1_MASK   0x80
0112 #define MAX8907_REG_CHG_IRQ2_MASK   0x81
0113 #define MAX8907_REG_CHG_STAT        0x82
0114 #define MAX8907_REG_WLED_MODE_CNTL  0x84
0115 #define MAX8907_REG_ILED_CNTL       0x84
0116 #define MAX8907_REG_II1RR       0x8E
0117 #define MAX8907_REG_II2RR       0x8F
0118 #define MAX8907_REG_LDOCTL20        0x9C
0119 #define MAX8907_REG_LDOSEQCNT20     0x9D
0120 #define MAX8907_REG_LDO20VOUT       0x9E
0121 
0122 /* RTC register map */
0123 #define MAX8907_REG_RTC_SEC     0x00
0124 #define MAX8907_REG_RTC_MIN     0x01
0125 #define MAX8907_REG_RTC_HOURS       0x02
0126 #define MAX8907_REG_RTC_WEEKDAY     0x03
0127 #define MAX8907_REG_RTC_DATE        0x04
0128 #define MAX8907_REG_RTC_MONTH       0x05
0129 #define MAX8907_REG_RTC_YEAR1       0x06
0130 #define MAX8907_REG_RTC_YEAR2       0x07
0131 #define MAX8907_REG_ALARM0_SEC      0x08
0132 #define MAX8907_REG_ALARM0_MIN      0x09
0133 #define MAX8907_REG_ALARM0_HOURS    0x0A
0134 #define MAX8907_REG_ALARM0_WEEKDAY  0x0B
0135 #define MAX8907_REG_ALARM0_DATE     0x0C
0136 #define MAX8907_REG_ALARM0_MONTH    0x0D
0137 #define MAX8907_REG_ALARM0_YEAR1    0x0E
0138 #define MAX8907_REG_ALARM0_YEAR2    0x0F
0139 #define MAX8907_REG_ALARM1_SEC      0x10
0140 #define MAX8907_REG_ALARM1_MIN      0x11
0141 #define MAX8907_REG_ALARM1_HOURS    0x12
0142 #define MAX8907_REG_ALARM1_WEEKDAY  0x13
0143 #define MAX8907_REG_ALARM1_DATE     0x14
0144 #define MAX8907_REG_ALARM1_MONTH    0x15
0145 #define MAX8907_REG_ALARM1_YEAR1    0x16
0146 #define MAX8907_REG_ALARM1_YEAR2    0x17
0147 #define MAX8907_REG_ALARM0_CNTL     0x18
0148 #define MAX8907_REG_ALARM1_CNTL     0x19
0149 #define MAX8907_REG_RTC_STATUS      0x1A
0150 #define MAX8907_REG_RTC_CNTL        0x1B
0151 #define MAX8907_REG_RTC_IRQ     0x1C
0152 #define MAX8907_REG_RTC_IRQ_MASK    0x1D
0153 #define MAX8907_REG_MPL_CNTL        0x1E
0154 
0155 /* ADC and Touch Screen Controller register map */
0156 #define MAX8907_CTL         0
0157 #define MAX8907_SEQCNT          1
0158 #define MAX8907_VOUT            2
0159 
0160 /* mask bit fields */
0161 #define MAX8907_MASK_LDO_SEQ        0x1C
0162 #define MAX8907_MASK_LDO_EN     0x01
0163 #define MAX8907_MASK_VBBATTCV       0x03
0164 #define MAX8907_MASK_OUT5V_VINEN    0x10
0165 #define MAX8907_MASK_OUT5V_ENSRC    0x0E
0166 #define MAX8907_MASK_OUT5V_EN       0x01
0167 #define MAX8907_MASK_POWER_OFF      0x40
0168 
0169 /* Regulator IDs */
0170 #define MAX8907_MBATT   0
0171 #define MAX8907_SD1 1
0172 #define MAX8907_SD2 2
0173 #define MAX8907_SD3 3
0174 #define MAX8907_LDO1    4
0175 #define MAX8907_LDO2    5
0176 #define MAX8907_LDO3    6
0177 #define MAX8907_LDO4    7
0178 #define MAX8907_LDO5    8
0179 #define MAX8907_LDO6    9
0180 #define MAX8907_LDO7    10
0181 #define MAX8907_LDO8    11
0182 #define MAX8907_LDO9    12
0183 #define MAX8907_LDO10   13
0184 #define MAX8907_LDO11   14
0185 #define MAX8907_LDO12   15
0186 #define MAX8907_LDO13   16
0187 #define MAX8907_LDO14   17
0188 #define MAX8907_LDO15   18
0189 #define MAX8907_LDO16   19
0190 #define MAX8907_LDO17   20
0191 #define MAX8907_LDO18   21
0192 #define MAX8907_LDO19   22
0193 #define MAX8907_LDO20   23
0194 #define MAX8907_OUT5V   24
0195 #define MAX8907_OUT33V  25
0196 #define MAX8907_BBAT    26
0197 #define MAX8907_SDBY    27
0198 #define MAX8907_VRTC    28
0199 #define MAX8907_NUM_REGULATORS (MAX8907_VRTC + 1)
0200 
0201 /* IRQ definitions */
0202 enum {
0203     MAX8907_IRQ_VCHG_DC_OVP = 0,
0204     MAX8907_IRQ_VCHG_DC_F,
0205     MAX8907_IRQ_VCHG_DC_R,
0206     MAX8907_IRQ_VCHG_THM_OK_R,
0207     MAX8907_IRQ_VCHG_THM_OK_F,
0208     MAX8907_IRQ_VCHG_MBATTLOW_F,
0209     MAX8907_IRQ_VCHG_MBATTLOW_R,
0210     MAX8907_IRQ_VCHG_RST,
0211     MAX8907_IRQ_VCHG_DONE,
0212     MAX8907_IRQ_VCHG_TOPOFF,
0213     MAX8907_IRQ_VCHG_TMR_FAULT,
0214 
0215     MAX8907_IRQ_GPM_RSTIN = 0,
0216     MAX8907_IRQ_GPM_MPL,
0217     MAX8907_IRQ_GPM_SW_3SEC,
0218     MAX8907_IRQ_GPM_EXTON_F,
0219     MAX8907_IRQ_GPM_EXTON_R,
0220     MAX8907_IRQ_GPM_SW_1SEC,
0221     MAX8907_IRQ_GPM_SW_F,
0222     MAX8907_IRQ_GPM_SW_R,
0223     MAX8907_IRQ_GPM_SYSCKEN_F,
0224     MAX8907_IRQ_GPM_SYSCKEN_R,
0225 
0226     MAX8907_IRQ_RTC_ALARM1 = 0,
0227     MAX8907_IRQ_RTC_ALARM0,
0228 };
0229 
0230 struct max8907_platform_data {
0231     struct regulator_init_data *init_data[MAX8907_NUM_REGULATORS];
0232     bool pm_off;
0233 };
0234 
0235 struct regmap_irq_chips_data;
0236 
0237 struct max8907 {
0238     struct device           *dev;
0239     struct mutex            irq_lock;
0240     struct i2c_client       *i2c_gen;
0241     struct i2c_client       *i2c_rtc;
0242     struct regmap           *regmap_gen;
0243     struct regmap           *regmap_rtc;
0244     struct regmap_irq_chip_data *irqc_chg;
0245     struct regmap_irq_chip_data *irqc_on_off;
0246     struct regmap_irq_chip_data *irqc_rtc;
0247 };
0248 
0249 #endif